Para 4-30, Para 4-32, Figure 4-7 – HP TM 11-6625-2779-14&P User Manual

Page 33

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Model 3555B Section IV

identical in operation, only the first will be discussed in
detail.
4-27. Referring to Figure 7-4, the signal is applied to
the assembly through pin 22. If C MSG is selected the
signal is first attenuated by A4R1, A4R2 and A4R3A.
Potentiometer A4R3A is for C MSG level adjustment for
0dB at 1kHz. The signal is then applied to the first in a
series of amplifiers. The first amplifier consists of A4Q1
through A4Q4. Differential amplifier A4Q1 and A4Q2
amplifies the signal and applies it to A4Q3 and A4Q4.
The emitter circuit of A4Q4 provides two feedback
signals, positive feedback through A4R8 and A4C4 to
the base of A4Q1 and negative feedback to the base of
A4Q2. The gain of this amplifier is controlled by the
ratio of the value of A4R10 to the value of A4R9. For
example, increasing the value of A4R9 would increase
the negative feedback and reduce the amplifier gain.
Gain can be calculated by the equation:

A4R10

Gain = 1 + A4R9

Positive feedback to the base of A4Q1 determines the
frequency response of this amplifier and is controlled by
the value of A4C4 and A4R8. All five of the amplifiers
are used in C Message weighting.
4-28. The Program weighting filter utilizes only
amplifiers No. 2 and No. 3 as shown in Figure 7-1.
These amplifiers are identical to the one described in
the preceeding paragraph except for the value of the
positive feedback utilized for shaping and the negative
feedback used for gain control. This negative feedback
is modified by resistance in the feedback divider at the
base of A4Q12. Transistors A4Q5 and A4Q6 provide
additional gain required for Program weighting.
Potentiometer A4R3B is used for PROG level
adjustment at 1kHz.

4-29. The 3kHz FLAT and 15kHz FLAT weighting
filters utilize only amplifier as indicated in Figure 7-1.
The only difference between these two active filters is in
the positive feedback used for shaping and in the
negative feedback used for gain. The negative
feedback is altered by adding resistance to the feedback
divider at the base of A4Q12.
4-30. METER AMPLIFIER. (Schematic No. 4)
4-31. The meter amplifier consists of A3Q6 through
A3Q10. The signal is first amplified by differential
amplifier A3Q6 and A3Q7. The signal is taken from the
collector of A3Q6 and then amplified by A3Q9 and
A3Q10. Transistor A3Q8 provides isolation between
A3Q7 and A3Q9 to prevent undesired feedback. Two
signals are taken from A3Q10. The collector circuit
supplies a signal to the DIAL/AC MON jacks for the
purpose of listening to the measured signal. The emitter
circuit of A2Q10 provides a drive signal for the detector
circuit.
4-32. DETECTOR. (Schematic No. 4)
4-33. The detector is a class B rms detector which
combines the features of an average detector and a
peak detector. When the average detected signals and
the peak detected signals are combined in the proper
proportion an equivalent rms response is produced.
4-34. First consider the average detection in this
circuit. (See Figure 7-5). Transistors A3Q12-A3Q13
and A3Q15-A3Q16 are functionally symmetrical. This
means that A3Q14 and A3Q17 are driven by the same
signal. When the signal at the base of A3017 and
A3Q14 goes negative, A3Q! 4 turns on and A3Q17 turns
off. No current will flow through the meter. On the
positive half cycle A3Q14 turns off and A3Q17 turns on.
The current paths for the average detector are shown in
Figure 4-4.

Figure 4-7. Simplified Peak Detection

4-7

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