MiTAC 7521 PLUS/N - Manual (Page 145)

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A A
B B
C C
D D
REV DESCRIPTION OF CHANGE ECR APPROVAL DATE
DRAWN DESIGN CHECK ISSUES
R00 09/29/2000
7521 plus R02
R0B 02/01/2001 1.Add 10K ohm pull high resistor between +3v and DS90363 pin 14.
2.Add frequency select resistor.
3.Add ESD solution on PCMCIA socket.
4.Change test pin resistor of SiS900 form 4.7K to 10K ohm.
6.Add 0 ohm pull high resistor between +S5V and EEPROM pin 6.
7.Modify Vcc_RTC circuit.
8.Modify Vmain_PWROK circuit.
9.Modify Vcc_CORE circuit.
10.Change SiS900 interrupt from IRQB to IRQC.
12.Add filter circuit for 25Mhz oscillator.
5.Correct autoload pin of SiS900 power form +5V to +S5V.
03/01/2001 R01 1.Add RLZ5.6B between VDD5 to GND.
2.Modify GPIO 83601R reset circiut.
4.Add LCD panel ID select DIP switch.
3.Modify CH7005 R-set circiut.
5.Modify CRT_ISOLATE circuit.
6.Modify LM393A circuit for RTC data loss problem.
R02 04/30/2001 1.Add AGPAVDD1 circiut for LCD panel incorrect color.
2.Modify "Enable_VGA AND PCI_RST#" circuit.
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7521 plus
C
1 30 Tuesday, May 08, 2001
MITAC INTERNATIONAL CORP.
SD411670000002
Title
Size Document Number Rev
Date: Sheet of
GND
GND GND_D
GND GND GND
GND GND_D
GND
GND_D
GND
L517
BEAD_120Z/100M
1 2
L520
BEAD_120Z/100M
1 2
MTG14
MTG118_N_RD30X12
1
2
3
4
5
6
7
8
9
10
11
12
MTG11
MTG118_N_RD30X12
1
2
3
4
5
6
7
8
9
10
11
12
MTG8
MTG118_N_RD30X12
1
2
3
4
5
6
7
8
9
10
11
12
FD504
FD_DOT040
1
MTG10
MTG118_N_RD30X12
1
2
3
4
5
6
7
8
9
10
11
12
FD503
FD_DOT040
1
FD501
FD_DOT040
1
FD3
FD_DOT040
1
FD502
FD_DOT040
1
FD2
FD_DOT040
1
FD1
FD_DOT040
1
FD4
FD_DOT040
1
MTG1
MTG118_N_RD30X12
1
2
3
4
5
6
7
8
9
10
11
12
MTG6
MTG118_N_RD30X12
1
2
3
4
5
6
7
8
9
10
11
12
MTG7
MTG118_N_RD30X12
1
2
3
4
5
6
7
8
9
10
11
12
MTG9
MTG118_N_RD30X12
1
2
3
4
5
6
7
8
9
10
11
12
MTG12
ID2.1/OD5.0
1
MTG13
ID2.1/OD5.0
1