Inova PD00941013.001 - Manual (Page 79)

©2004 Inova Computers GmbH Page C-9 ICP-P4/PM/CM Appendix-C
Appendix C ITM-RIO
CompactPCI
®
C
C1.7 VGA Interface
The VGA signals appearing on this interface are from the CPU chipset or AGP piggyback (if config-
ured for rear I/O signalling). Figure C1.7 and Table C1.7 provide the pinout and signal description
of this standard VGA interface respectively. With an AGP video piggyback installed, the video
image appearing on this rear I/O interface can be selected to be different to that appearing on the
front-panel. This is possible through (in this case) the piggyback’s dual independent Radeon 7000
graphics engines.
Note:
Using the chipset graphics for both
front and rear I/O simultaneously is
not advisable as the loading may be
too great. If both front and rear I/O
VGA are required then the twin-
engined, Radeon-based AGP piggy-
back graphic option should be used.
Figure C1.7 VGA Interface Pinout
Table C1.7 Video Output Connector Signals
5
15
1
11
10 6
Pin No. Signal
1 Analog RED
2 Analog GREEN
3 Analog BLUE
4 N/C
5, 6, 7, 8 CRT Ground
9 +5V (DDC)
10 CRT Ground
11 N/C
12 DDC-SDA
13 HSYNC
14 VSYNC
15 DDC-SCL