Silicon Laboratories C8051F347 - Manual (Page 206)

C8051F340/1/2/3/4/5/6/7/8/9/A/B/C/D
206 Rev. 1.3
18.1. Enhanced Baud Rate Generation
The UART0 baud rate is generated by Timer 1 in 8-bit auto-reload mode. The TX clock is generated by
TL1; the RX clock is generated by a copy of TL1 (shown as RX Timer in Figure 18.2), which is not
user-accessible. Both TX and RX Timer overflows are divided by two to generate the TX and RX baud
rates. The RX Timer runs when Timer 1 is enabled, and uses the same reload value (TH1). However, an
RX Timer reload is forced when a START condition is detected on the RX pin. This allows a receive to
begin any time a START is detected, independent of the TX Timer state.
Figure 18.2. UART0 Baud Rate Logic
Timer 1 should be configured for Mode 2, 8-bit auto-reload (see Section “21.1.3. Mode 2: 8-bit Counter/
Timer with Auto-Reload” on page 237 ). The Timer 1 reload value should be set so that overflows will
occur at two times the desired UART baud rate frequency. Note that Timer 1 may be clocked by one of six
sources: SYSCLK, SYSCLK / 4, SYSCLK / 12, SYSCLK / 48, the external oscillator clock / 8, or an exter-
nal input T1. For any given Timer 1 clock source, the UART0 baud rate is determined by Equation 18.1.
Equation 18.1. UART0 Baud Rate
Where T1
CLK
is the frequency of the clock supplied to Timer 1, and T1H is the high byte of Timer 1 (reload
value). Timer 1 clock frequency is selected as described in Section “21. Timers” on page 235 . A quick
reference for typical baud rates using the internal oscillator is given in Table 18.1. Note that the internal
oscillator may still generate the system clock if an external oscillator is driving Timer 1.
18.2. Operational Modes
UART0 provides standard asynchronous, full duplex communication. The UART mode (8-bit or 9-bit) is
selected by the S0MODE bit (SCON0.7). Typical UART connection options are shown below.
RX Timer
Start
Detected
Overflow
Overflow
TH1
TL1 TX Clock 2
RX Clock 2
Timer 1 UART
UartBaudRate
T1
CLK
256 T1H –
 
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1
2
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
=