ST & T UPSD3212C - Manual (Page 138)

uPSD3212A, uPSD3212C, uPSD3212CV
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Table 115. DC Characteristics (3V Devices)
Symbol Parameter
Test Condition
(in addition to those
in Table
110., page 133 )
Min. Typ. Max. Unit
V
IH
Input High Voltage (Ports 1, 2,
3, 4[Bits 7,6,5,4,3,1,0], A, B, C,
D, XTAL1, RESET)
3.0V < V
CC
< 3.6V 0.7V
CC
V
CC
+ 0.5 V
V
IH1
Input High Voltage (Port 4[Bit
2])
3.0V < V
CC
< 3.6V 2.0 V
CC
+ 0.5 V
V
IL
Input High Voltage (Ports 1, 2,
3, 4[Bits 7,6,5,4,3,1,0], XTAL1,
RESET)
3.0V < V
CC
< 3.6V V
SS
– 0.5 0.3V
CC V
V
IL1
Input Low Voltage
(Ports A, B, C, D)
3.0V < V
CC
< 3.6V –0.5 0.8 V
Input Low Voltage
(Port 4[Bit 2])
3.0V < V
CC
< 3.6V V
SS
– 0.5 0.8 V
V
OL
Output Low Voltage
(Ports A,B,C,D)
I
OL
= 20µA
V
CC
= 3.0V
0.01 0.1 V
I
OL
= 4mA
V
CC
= 3.0V
0.15 0.45 V
V
OL1
Output Low Voltage
(Ports 1,2,3,4, WR, RD)
I
OL
= 1.6mA 0.45 V
I
OL
= 100µA 0.3 V
V OL2
Output Low Voltage
(Port 0, ALE, PSEN)
I
OL
= 3.2mA 0.45 V
I
OL
= 200µA 0.3 V
V
OH
Output High Voltage
(Ports A,B,C,D)
I
OH
= –20µA
V
CC
= 3.0V
2.9 2.99 V
I
OH
= –1mA
V
CC
= 3.0V
2.4 2.6 V
V
OH1
Output High Voltage
(Ports 1,2,3,4, WR, RD)
I
OH
= –20µA 2.0 V
I
OH
= –10µA 2.7 V
V
OH2
Output High Voltage (Port 0 in
ext. Bus Mode, ALE, PSEN)
I
OH
= –800µA 2.0 V
I
OH
= –80µA 2.7 V
V
OH3
Output High Voltage V
STBYON
I
OH
= –1µA V
STBY
– 0.8 V
V
LVR
Low Voltage Reset 0.1V hysteresis 2.3 2.5 2.7 V
V
OP
XTAL Open Bias Voltage
(XTAL1, XTAL2)
I
OL
= 3.2mA 1.0 2.0 V
V
LKO
V
CC
(min) for Flash Erase and
Program
1.5 2.2 V
V
STBY SRAM (PSD) Standby Voltage 2.0 V
CC
– 0.2 V
V
DF
SRAM (PSD) Data Retention
Voltage
Only on V
STBY 2 V
I
IL
Logic '0' Input Current
(Ports 1,2,3,4) V
IN
= 0.45V
(0V for Port 4[pin 2])
–1 –50 µA