ST & T UPSD3212C - Manual (Page 19)

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uPSD3212A, uPSD3212C, uPSD3212CV
Table 5. Logical Instructions
Mnemonic Operation
Addressing Modes
Dir. Ind. Reg. Imm
ANL A,<byte> A = A .AND. <byte> X X X X
ANL <byte>,A A = <byte> .AND. A X
ANL <byte>,#data A = <byte> .AND. #data X
ORL A,<byte> A = A .OR. <byte> X X X X
ORL <byte>,A A = <byte> .OR. A X
ORL <byte>,#data A = <byte> .OR. #data X
XRL A,<byte> A = A .XOR. <byte> X X X X
XRL <byte>,A A = <byte> .XOR. A X
XRL <byte>,#data A = <byte> .XOR. #data X
CRL A A = 00h Accumulator only
CPL A A = .NOT. A Accumulator only
RL A Rotate A Left 1 bit Accumulator only
RLC A Rotate A Left through Carry Accumulator only
RR A Rotate A Right 1 bit Accumulator only
RRC A Rotate A Right through Carry Accumulator only
SWAP A Swap Nibbles in A Accumulator only