ST & T UPSD3212C User Manual
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uPSD3212A, uPSD3212C, uPSD3212CV
Table 117. External Program Memory AC Characteristics (with the 3V MCU Module)
Note: 1. Conditions (in addition to those in
, V
CC
= 3.0 to 3.6V): V
SS
= 0V; C
L
for Port 0, ALE and PSEN output is 100pF,
for 5V devices, and 50pF for 3V devices; C
L
for other outputs is 80pF, for 5V devices, and 50pF for 3V devices)
2. Interfacing the uPSD321x Devices to devices with float times up to 35ns is permissible. This limited bus contention does not cause
any damage to Port 0 drivers.
Symbol
Parameter
(1)
24MHz Oscillator
Variable Oscillator
1/t
CLCL
= 8 to 24MHz
Unit
Min
Max
Min
Max
t
LHLL
ALE pulse width
43
2t
CLCL
– 40
ns
t
AVLL
Address set up to ALE
17
t
CLCL
– 25
ns
t
LLAX
Address hold after ALE
17
t
CLCL
– 25
ns
t
LLIV
ALE Low to valid instruction in
80
4t
CLCL
– 87
ns
t
LLPL
ALE to PSEN
22
t
CLCL
– 20
ns
t
PLPH
PSEN pulse width
95
3t
CLCL
– 30
ns
t
PLIV
PSEN to valid instruction in
60
3t
CLCL
– 65
ns
t
PXIX
Input instruction hold after PSEN
0
0
ns
t
PXIZ
(2)
Input instruction float after PSEN
32
t
CLCL
– 10
ns
t
PXAV
(2)
Address valid after PSEN
37
t
CLCL
– 5
ns
t
AVIV
Address to valid instruction in
148
5t
CLCL
– 60
ns
t
AZPL
Address float to PSEN
–10
–10
ns