Renesas SuperH HS0720KCU01HE - Manual (Page 22)

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3. Low-Power States
• When the emulator is used, the sleep state can be cleared with either the clearing function
or with the [STOP] button, and a break will occur.
• The memory must not be accessed or modified in software standby state.
• The memory must not be accessed or modified in deep standby state.
• Do not stop inputting the clock to the H-UDI module by using the module standby function.
4. Reset Signals
The MCU reset signals are only valid during emulation started with clicking the GO or STEP-
type button. If these signals are enabled on the user system in command input wait state, they
are not sent to the MCU.
Note: Do not break the user program when the RES#, BREQ#, or WAIT# signal is being low. A
TIMEOUT error will occur. If the BREQ# or WAIT# signal is fixed to low during break,
a TIMEOUT error will occur at memory access. The signal names mean the standard
signals and may differ according to the MCU in use. In some cases, there will be no
corresponding signals.
5. Direct Memory Access Controller (DMAC)
The DMAC operates even when the emulator is used. When a data transfer request is
generated, the DMAC executes DMA transfer.
6. Memory Access during User Program Execution
During execution of the user program, memory is accessed by the following two methods, as
shown in table 2.2; each method offers advantages and disadvantages.
Table 2.2 Memory Access during User Program Execution
Method Advantage Disadvantage
H-UDI read/write The stopping time of the user
program is short because memory
is accessed by the dedicated bus
master. Cache access is disabled. Actual
memory is always accessed by the
H-UDI read or write.
Short break Cache access is enabled. The stopping time of the user
program is long because the user
program temporarily breaks.
The method for accessing memory during execution of the user program is specified by using
the [Configuration] dialog box.