Renesas SuperH HS0720KCU01HE - Manual (Page 49)

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Table 2.15 Measurement Item
Selected Name Option
Disabled None
Elapsed time AC (The number of execution cycles (I
φ) is set
as the measurement item.)
Branch instruction counts BT
Number of execution instructions I
Number of execution 32bit-instructions I32
Exception/interrupt counts EA
Interrupt counts INT
Data cache-miss counts DC
Instruction cache-miss counts IC
All area access counts ARN
All area instruction access counts ARIN
All area data access counts ARND
Cacheable area access counts CDN (data access)
Cacheable area instruction access counts CIN
Non cacheable area data access counts NCN
URAM area access counts UN
URAM area instruction access counts UIN
URAM area data access counts UDN
Internal I/O area data access counts IODN
Internal ROM area access counts RN
Internal ROM area instruction access counts RIN
Internal ROM area data access counts RDN
All area access cycle ARC
All area instruction access cycle ARIC
All area data access cycle ARDC
All area access stall ARS
All area instruction access stall ARIS
All area data access stall ARDS
Note: Selected names are displayed for CONDITION in the [Performance Analysis] window.
Options are parameters for <mode> of the PERFORMANCE_SET command.