Functional operation, Clock requirements, Receive fifo – Xilinx LOGICORE UG144 User Manual
Page 131: Transmit fifo, Clock requirements receive fifo transmit fifo
1-Gigabit Ethernet MAC v8.5 User Guide
131
UG144 April 24, 2009
Functional Operation
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Functional Operation
Clock Requirements
The FIFO is designed to work with rx_clk and tx_clk running at MAC clock speeds up
to 125 MHz. The rx_ll_clock should be no slower than the rx_clk. The tx_ll_clock
should be no slower than the clock on the transmitter client interface divided by 2. For this
reason, it is suggested that the rx_ll_clock and tx_ll_clock are always 125 MHz or
faster.
Receive FIFO
The receive FIFO is built around two Dual Port Block RAMs giving a memory capacity of
4096 bytes.
The receive FIFO takes data from the client interface of the GEMAC core and converts it
into LocalLink format. See
“Receiving Inbound Frames,” on page 39
for a description of the
GEMAC receive client interface. If the frame is marked as good by the GEMAC, that frame
is presented on the LocalLink interface for reading by the user. If the frame is marked as
bad, it is dropped by the FIFO.
If the receive FIFO memory overflows, the frame currently being received is dropped,
regardless of whether it is a good or bad frame,. The signal rx_overflow is then asserted.
Situations in which the memory may overflow are:
•
The FIFO may overflow if the user is reading data from the FIFO at a slower data rate
than data is being written in from the MAC receiver.
•
The FIFO size of 4096 bytes limits the size of the frames that it can store without error.
If a frame is larger than 4000 bytes, the FIFO may overflow and data will be lost. For
this reason, it is recommended that the FIFO not be used with the GEMAC in jumbo
frame mode for frames larger than 4000 bytes.
Transmit FIFO
The transmit FIFO is built around two Dual Port block RAMs, giving a total memory
capacity of 4096 byes of frame data.
The transmit FIFO accepts frames in LocalLink format and stores them in block RAM for
transmission via the GEMAC. When a full frame has been written into the transmit FIFO,
the FIFO will present data to the MAC transmitter. On receiving the tx_ack signal from
the MAC, the rest of the frame is transmitted to the MAC.
VHDL
The generic FULL_DUPLEX_ONLY is provided to allow the removal of logic and
performance constraints necessary for half-duplex operation when using with the Xilinx
Tri-Mode Ethernet MAC core. This generic can always be set to true when the FIFO is used
with the GEMAC.