Xilinx LOGICORE UG144 - Manual (Page 45)

1-Gigabit Ethernet MAC v8.5 User Guide www.xilinx.com 45
UG144 April 24, 2009
Receiving Inbound Frames R
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Table 5-2: Bit Definition for the Receiver Statistics Vector
rx_statistics_vector
bit(s)
Name Description
27 Address Match If the optional Address Filter is included in the
core, this bit is asserted if the address of the
incoming frame matches one of the stored or
pre-set addresses in the Address Filter. If the
Address Filter is omitted from the core, or is
configured in promiscuous mode, this line is
held high.
26 Reserved Always at logic 0.
25 Length/Type
Out of Range If the length/type field contained a length
value that did not match the number of MAC
client data bytes received and the length/type
field checks are enabled, then this bit is
asserted.
This bit is also asserted if the length/type field
is less than 46 and the frame is not padded to
exactly 64 bytes. This is independent of
whether or not the length/type field checks
are enabled.
24 Bad Opcode Asserted if the previous frame was error-free
and contained the special control frame
identifier in the length/type field, but
contained an opcode that is unsupported by
the MAC (any opcode other than Pause).
23 Flow Control
Frame Asserted if the previous frame met all the
following conditions:
• error-free
• contained the special control frame
identifier in the length/type field
• contained a destination address that
matched either the MAC Control Multicast
Address or the configured source address
of the MAC
• contained the supported Pause opcode
• was acted upon by the MAC
22 Byte Valid Asserted if a MAC frame byte (DA to FCS
inclusive) is in the process of being received.
This is valid on every clock cycle.
Do not use this as an enable signal to indicate
that data is present on rx_data.
21 VLAN frame Asserted if the previous frame contained a
VLAN identifier in the length/type field when
receiver VLAN operation is enabled.