Rainbow Electronics T89C51CC01 User Manual
Page 132
132
T89C51CC01
Rev. D – 17-Dec-01
Table 94. IPH1 Register
IPH1 (S:FFh)
Interrupt high priority Register 1
Reset Value = XXXX X000b
7
6
5
4
3
2
1
0
-
-
-
-
POVRH
PADCH
PCANH
Bit
Number
Bit
Mnemonic
Description
7
-
Reserved
The value read from this bit is indeterminate. Do not set this bit.
6
-
Reserved
The value read from this bit is indeterminate. Do not set this bit.
5
-
Reserved
The value read from this bit is indeterminate. Do not set this bit.
4
-
Reserved
The value read from this bit is indeterminate. Do not set this bit.
3
-
Reserved
The value read from this bit is indeterminate. Do not set this bit.
2
POVRH
Timer overrun Interrupt Priority level most significant bit
POVRH
POVRLPriority level
0
0
Lowest
0
1
1
0
1
1
Highest
1
PADCH
ADC Interrupt Priority level most significant bit
PADCH
PADCL
Priority level
0
0
Lowest
0
1
1
0
1
1
Highest
0
PCANH
CAN Interrupt Priority level most significant bit
PCANH
PCANLPriority level
0
0
Lowest
0
1
1
0
1
1
Highest