Rainbow Electronics T89C51CC01 - Manual (Page 141)

141
T89C51CC01
Rev. D – 17-Dec-01
19.4.6 External Data Memory
Read Cycle
19.4.7 Serial Port Timing -
Shift Register Mode Table 101. Symbol Description (F= 40 MHz)
Table 102. AC Parameters for a Fix Clock (F= 40 MHz)
ALE
PSEN
RD
PORT 0
PORT 2
A0-A7 DATA IN
ADDRESS
OR SFR-P2
T
AVWL
T
LLWL
T
RLAZ
ADDRESS A8-A15 OR SFR P2
T
RHDZ
T
WHLH
T
RLRH
T
LLDV
T
RHDX
T
LLAX
T
AVDV
Symbol Parameter
T
XLXL
Serial port clock cycle time
T
QVHX
Output data set-up to clock rising edge
T
XHQX
Output data hold after clock rising edge
T
XHDX
Input data hold after clock rising edge
T
XHDV
Clock rising edge to input data valid
Symbol
Min Max
Units
T
XLXL
300 ns
T
QVHX
200 ns
T
XHQX
30 ns
T
XHDX
0 ns
T
XHDV
117 ns