Rainbow Electronics ATtiny861_V - Manual (Page 111)

111
2588B–AVR–11/06
ATtiny261/461/861
It is important to notice that accessing 10-bit registers are atomic operations. If an interrupt
occurs between the two instructions accessing the 10-bit register, and the interrupt code
updates the TC1H register by accessing the same or any other of the 10-bit timer registers, then
the result of the access outside the interrupt will be corrupted. Therefore, when both the main
code and the interrupt code update the TC1H register, the main code must disable the interrupts
during the 16-bit access.
The following code examples show how to do an atomic read of the TCNT1 register contents.
Reading any of the OCR1A/B/C/D registers can be done by using the same principle.
Note: 1. The example code assumes that the part specific header file is included.
For I/O registers located in extended I/O map, “IN”, “OUT”, “SBIS”, “SBIC”, “CBI”, and “SBI”
instructions must be replaced with instructions that allow access to extended I/O. Typically
“LDS” and “STS” combined with “SBRS”, “SBRC”, “SBR”, and “CBR”.
The assembly code example returns the TCNT1 value in the r17:r16 register pair.
Assembly Code Example
TIM1_ReadTCNT 1:
; Save global interrupt flag
in r18,SREG
; Disable interrupts
cli
; Read TCNT 1 into r17:r16
in r16,TCNT 1
in r17,TC 1H
; Restore global interrupt flag
out SREG,r18
ret
C Code Example
unsigned int TIM1_ReadTCNT1( void )
{
unsigned char sreg;
unsigned int i;
/* Save global interrupt flag */
sreg = SREG;
/* Disable interrupts */
_CLI();
/* Read TCNT1 into i */
i = TCNT1;
i |= ((unsigned int)TC1H << 8);
/* Restore global interrupt flag
SREG = sreg;
return i;
}