Rainbow Electronics ATtiny861_V - Manual (Page 129)

129
2588B–AVR–11/06
ATtiny261/461/861
rjmp SPITransfer_loop
lds r16,USIDR
ret
The code is size optimized using only eight instructions (+ ret). The code example assumes that
the DO and USCK pins are enabled as output in the DDRA or DDRB Register. The value stored
in register r16 prior to the function is called is transferred to the Slave device, and when the
transfer is completed the data received from the Slave is stored back into the r16 Register.
The second and third instructions clears the USI Counter Overflow Flag and the USI counter
value. The fourth and fifth instruction set Three-wire mode, positive edge Shift Register clock,
count at USITC strobe, and toggle USCK. The loop is repeated 16 times.
The following code demonstrates how to use the USI module as a SPI Master with maximum
speed (fsck = fck/4):
SPITransfer_Fast:
sts USIDR,r16
ldi r16,(1<<USIWM0)|(0<<USICS0)|(1<<USITC)
ldi r17,(1<<USIWM0)|(0<<USICS0)|(1<<USITC)|(1<<USICLK)
sts USICR,r16 ; MSB
sts USICR,r17
sts USICR,r16
sts USICR,r17
sts USICR,r16
sts USICR,r17
sts USICR,r16
sts USICR,r17
sts USICR,r16
sts USICR,r17
sts USICR,r16
sts USICR,r17
sts USICR,r16
sts USICR,r17
sts USICR,r16 ; LSB
sts USICR,r17
lds r16,USIDR
ret