Rainbow Electronics AT89LP214 - Manual (Page 63)

63
3538A–MICRO–7/06
AT89LP213/214 [Preliminary]
22. On-chip Debug System
The AT89LP213/214 On-chip Debug (OCD) System uses a two-wire serial interface to control
program flow; read, modify, and write the system state; and program the nonvolatile memory.
The OCD System has the following features:
• Complete program flow control
• Read-modify-write access to all internal SFRs and data memories
• Four hardware program address breakpoints
• Unlimited program software breakpoints using BREAK instruction
• Break on stack overflow/underflow
• Break on Watchdog overflow
• Non-intrusive operation
• Programming of nonvolatile memory
22.1 Physical Interface
The On-chip Debug System uses a two-wire synchronous serial interface to establish communi-
cation between the target device and the controlling emulator system. The OCD interface is
controlled by two User Fuses. OCD is enabled by clearing the OCD Enable Fuse. When OCD is
enabled, the RST port pin is configured as an input for the Debug Clock (DCL). Either the XTAL1
or XTAL2 pin is configured as a bi-directional data line for the Debug Data (DDA) depending on
the clock source selected. If the External Clock is selected, XTAL2 is configured as DDA. If the
Internal RC Oscillator is selected, XTAL1 is configured as DDA. The OCD device connections
are shown in
Figure 22-1 . When OCD is enabled, the type of interface used depends on the
OCD Interface Select User Fuse. This fuse selects between a normal two-wire interface (TWI)
and a fast two-wire interface (FTWI). It is the duty of the user to program this fuse to the correct
setting for their debug system at the same time they enable OCD (see
“User Configuration
Fuses” on page 71 ).
Figure 22-1. AT89LP213/214 On-chip Debug Connections
When designing a system where On-chip Debug will be used, the following observations must
be considered for correct operation:
• P1.3/RST cannot be connected directly to V
CC
and any external capacitors connect to RST
must be removed.
• All external reset sources must be removed.
• The quartz crystal and any capacitors on XTAL1 or XTAL2 must be removed and an external
clock signal must be driven on XTAL1 if the user does not wish to use the internal RC
oscillator. Some emulator systems may provide a user-configurable clock for this purpose.
CLK = Internal RC
VCC
XTAL1
P1.3/RST
GND
DCL
DDA
CLK = External Clock
VCC
XTAL2
P1.3/RST
GND
DCL
DDA XTAL1 CLK