Rainbow Electronics AT89LP214 - Manual (Page 8)

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3538A–MICRO–7/06
AT89LP213/214 [Preliminary]
A map of the AT89LP213/214 program memory is shown in Figure 6-1 . In addition to the 2K
code space from 0000h to 07FFh, the AT89LP213/214 also supports a 64-byte User Signature
Array and a 32-byte Atmel Signature Array that are accessible by the CPU in a read-only fash-
ion. In order to read from the signature arrays, the SIGEN bit in AUXR1 must be set. While
SIGEN is one, MOVC A,@A+DPTR will access the signature arrays. The User Signature Array
is mapped to addresses 0040h to 007Fh and the Atmel Signature Array is mapped to addresses
0000h to 001Fh. SIGEN must be cleared before using MOVC to access the code memory.
The Atmel Signature Array is initialized with the Device ID in the factory. The User Signature
Array is available for user identification codes or constant parameter data. Data stored in the sig-
nature array is not secure. Security bits will disable writes to the array; however, reads are
always allowed.
6.2 Data Memory
The AT89LP213/214 contains 128 bytes of general SRAM data memory plus 128 bytes of I/O
memory mapped into a single 8-bit address space. The 128 bytes of data memory may be
accessed through both direct and indirect addressing of the lower 128 byte addresses. The 128
bytes of I/O memory reside in the upper 128 byte address space (
Figure 6-2 ). The I/O memory
can only be accessed through direct addressing and contains the Special Function Registers
(SFRs). Indirect accesses to the upper 128 byte addresses will return invalid data. The lowest
32 bytes of data memory are grouped into 4 banks of 8 registers each. The RS0 and RS1 bits
(PSW.3 and PSW.4) select which register bank is in use. Instructions using register addressing
will only access the currently specified bank. The AT89LP213/214 does not support external
data memory.
Figure 6-2. Data Memory Map
Table 6-1. AUXR1 – Auxiliary Register 1
AUXR1 = A2H Reset Value = XXXX 0XXXB
Not Bit Addressable
– – – – SIGEN – – –
Bit 7 6 5 4 3 2 1 0
FFH
UPPER
128
80H
7F H
LO WER
128
0
Accessible
By Direct
Addressing
Only
Accessible
By Direct
and Indirect
Addressing
Only
Special Function
Registers
Ports
Status and Control Bits
Timers
Registers
Stack Pointer
Accumulator
(Etc.)