Rainbow Electronics AT45DQ321 - Manual (Page 52)

52 AT45DQ321 [ADVANCE DATASHEET]
DS-45DQ321-031–DFLASH–12/2012
16. Power-On/Reset State
When power is first applied to the device, or when recovering from a reset condition, the device will default to SPI
Mode 3. In addition, the output pin (SO) will be in a high impedance state, and a high-to-low transition on the CS pin will
be required to start a valid instruction. The SPI mode (Mode 3 or Mode 0) will be automatically selected on every falling
edge of CS by sampling the inactive clock state.
16.1 Initial Power-Up Timing Restrictions
During power-up, the device must not be accessed for at least the minimum t
VCSL
time after the supply voltage reaches
the minimum V
CC
level. While the device is being powered-up, the internal Power-On Reset (POR) circuitry keeps the
device in a reset mode until the supply voltage rises above the maximum POR threshold value (V
POR
). During this time,
all operations are disabled and the device will not respond to any commands. After power-up, the device will be in the
standby mode.
If the first operation to the device after power-up will be a program or erase operation, then the operation cannot be
started until the supply voltage reaches the minimum V
CC
level and an internal device delay has elapsed. This delay will
be a maximum time of t
PUW
.
Table 16-1. Power-Up Timing
Figure 16-1. Power-Up Timing
Symbol Parameter Min Max Units
t
VCSL
Minimum V
CC
to Chip Select Low Time 85 μs
t
PUW
Power-Up Device Delay Before Program or Erase Allowed 5 ms
V
POR
Power-On Reset (POR) Voltage 1.5 2.2 V
Program/Erase Operations Permitted
Read Operation Permitted
V
CC
V
CC
(min)
V
POR
(max)
V
POR
(min)
Time
Do Not Attempt
Device Access
During this Time
t
PUW
t
VCSL