Teledyne LeCroy Protocol PCI Express Script Automation Test Tool - Manual (Page 39)

Teledyne LeCroy PCI Express Script Automation Test Tool User Manual
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3.2 Root Complex Tests
In the following test descriptions, the term “Issue command to the Driver” is often used. This term indicates that the
following sequence of steps is performed.
- Write the Command DWORD to the Command system buffer.
- Assert the legacy interrupt to interrupt the system.
- Wait for the Memory Write transaction from the system that acknowledges the interrupt.
- Deassert the legacy interrupt.
Note: All the Root Complex tests start with re-training and initialization of the PCI Express link, so this first default
step is omitted in the test descriptions.
3.2.1 Link Layer Test Descriptions
3.2.1.1 Test 41-20. ReservedFieldsDLLPReceive
ASSERTIONS COVERED: DLL.4.1#2
The intent of this test is to verify that the DUT truly ignores reserved fields in an ACK DLLP by sending arbitrary
data in those fields.
Trainer Stimulus: link_41-20_ReservedFieldsDLLPReceive.peg
Recording Options: link_layer_filter_ts.rec
Verification Scripts: link_41-20_ReservedFieldsDLLPReceive.pevs
Test Algorithm:
1. Issue command to the Driver to clear all error status bits for the Root or Switch port to which the Device
Emulator is attached.
2. Main test stage. Do the following:
a. Switch to the 'Disable' ACK/NAK policy.
b. Re-train and initialize the link.
c. Wait for the Set_Slot_Power_Limit Message from the Root.
d. Send an Ack DLLP with non-zero reserved field.
e. Switch back to the 'Automatic' ACK/NAK policy.
3. Issue command to the Driver to reflect the current values of the Error Reporting Registers for the port to
which the Device Emulator is attached (using Configuration Writes).
Pass/Fail Criteria:
Test should successfully progress though all test stages.
All test stages should be executed without protocol violations.
Verify that:
a) The DUT ignored the non-zero field(s) in the ACK and did not retransmit the Set_Slot_Power_Limit Message
TLP.
b) The DUT did not set any error bits in its Device Status register.
c) The DUT did not set any error bits in the Advanced Error Reporting registers (if implemented). This includes the
Advanced Uncorrectable Error Status register, Advanced Correctable Error Status register, and Root Error Status
register.
If the DUT meets all these criteria, the DUT passes the test.