2 transaction layer test descriptions, Transaction layer test descriptions, Test 1-1. txn_bft_requestcompletion – Teledyne LeCroy Protocol PCI Express Script Automation Test Tool User Manual

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Teledyne LeCroy

PCI Express Script Automation Test Tool User Manual

46

3.2.2 Transaction Layer Test Descriptions

3.2.2.1 Test 1-1. TXN_BFT_RequestCompletion


ASSERTIONS COVERED: TXN.2.7#9, TXN.2.21#15, TXN.2.21#19, TXN.3.1#1, TXN.3.1#2
Verify Basic Request and Completion handling of Root Complex devices.

Trainer Stimulus: trans_1-1_TXN_BFT_RequestCompletion.peg

Recording Options: link_layer.rec

Verification Scripts:
trans_1-1_TXN_BFT_RequestCompletion.pevs

Test Algorithm:

1. Issue command to the Driver to clear all error status bits for the Root or Switch port to which the Device

Emulator is attached.

2. Issue command to the Driver to perform a Tag synchronization sequence (if needed) to ensure the next

transaction is done with an expected Tag value.

3. Issue command to the Driver to perform a Memory Read transaction.
4. Wait for the Memory Read Request and issue Memory Read Completion with Unsupported Request status.
5. Issue command to the Driver to reflect the current values of the Error Reporting Registers for the port to

which the Device Emulator is attached (using Configuration Writes).

6. Issue command to the Driver to clear all error status bits for the Root or Switch port to which the Device

Emulator is attached.

7. Perform Memory Read transaction from the DUT (command memory system area).
8. Issue command to the Driver to reflect the current values of the Error Reporting Registers for the port to

which the Device Emulator is attached (using Configuration Writes).


Pass/Fail Criteria:

Test should successfully progress though all test stages.
All test stages should be executed without protocol violations.

Verify that:
a) The DUT system constructed Memory Read Request and Completion TLPs properly.
b) The DUT did not set any error bits in its Device Status register.
c) The DUT did not set any error bits in the Advanced Error Reporting registers (if implemented). This includes the
Advanced Uncorrectable Error Status register, Advanced Correctable Error Status register, and Root Error Status
register.

If the DUT meets all these criteria, the DUT passes the test.

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