Operator's manual – Teledyne LeCroy Serial Data Debug Solutions User Manual

Page 141

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Operator's Manual

919586 RevA

141

BRIEF HS CLOCK TIMING TEST DESCRIPTIONS

With HS Clock Timing selected in the Category field, the following Measure values are available:

TLP-01, TLCK-PREPARE, TLCK-ZERO, TLCK-PREPARE+ZERO, TLCK-TRAIL, TREOT, TEOT, THS-EXIT, UIinst,
and HS-Bitrate.

Name

Purpose

TLP-01

To verify that the duration (TLPX) of the final Clock Lane LP-01 state immediately before HS
transmission is greater than the minimum conformant value.

TCLK-PREPARE

To verify that the time that the DUT Clock Lane transmitter drives LP-00 (TCLK-PREPARE) prior
to driving TCLK-ZERO when entering HS mode, is within the conformance limits.

TCLK-ZERO

To verify the time that the DUT Clock Lane transmitter drives the extended HS-0 differential
state prior to starting clock transmission.

TCLK-
PREPARE+ZERO

To verify that the combined time of TCLK-PREPARE plus the time that the DUT Clock Lane
transmitter drives the extended HS-0 differential state prior to starting clock transmission
(TCLK-ZERO) is greater than the minimum required duration.

TCLK-TRAIL

To verify that the duration that the DUT Clock Lane HS transmitter drives the final HS-0
differential state following the last payload clock bit of a HS transmission burst (TCLK-TRAIL) is
greater than the minimum required value.

TREOT

To verify that the 30%-85% Post-EoT Rise Time (TREOT) of the DUT LP Clock Lane transmitter
is within the conformance limits.

TEOT

To verify that the interval measured from the start of the DUT Clock Lane HS transmitter’s
TCLK-TRAIL to the start of the first Clock Lane LP-11 state (TEOT) is less than the maximum
allowed limit.

THS-EXIT

To verify that the duration that the Clock Lane transmitter remains in the LP-11 (Stop) state
after exiting HS mode (THS-EXIT), is greater than the minimum required value.

UIinst

To verify that the Instantaneous Unit Interval values (UIINST) of the DUT HS Clock are within
the conformance limits.

HS-Bitrate

To verify the Bitrate of the DUT HS Clock is within conformance limits.

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