ADC ETU-751C - Manual (Page 25)

700-701-100-02 Functional Description
UTU-701 and ETU-751 List 1 August 9, 2002 15
For applications requiring fractional use of the G.703 port, embedded generation and detection of CRC-4
information, and A-bit insertion, select less than 32 time slots to invoke the structured mode. In the structured
mode time slot 0 is regenerated according to G.704 at the output of the G.703 interface port. The following values
apply:
• The Sa bits are always set to 1.
• The A bit is normally set to 0 at the G.703 output port. It is set to 1 during an active Loss of Signal (LOS),
Alarm Indicating Signal (AIS), or a Loss of Frame Alignment (LFA) condition, if the alarm associated with
the respective condition is not disabled (see
“Configure LTU and NTU Interfaces” on page 39 ).
• When CRC-4 mode is disabled, the Si bit is transparently transmitted (that is, unmodified from the HDSL
input data stream).
• When CRC-4 mode is enabled, the Si bit is set to a new CRC-4 multiframe signal and checksum (according
to G.706).
• The E-bits are nominally set to 1 and set to 0 for each error in the incoming CRC-4 sub-multiframe.
Table 7. Typical Structured Mode System Settings
Options Setting
Application Mode <32 TS (Structured)
LTU Interface
Primary Timing Source G.703
G.703 Port
CRC-4 Mode Enabled
Idle Code FF
Data Rate / # of TSs 1536 kbps / 24
Beginning TS 1
NTU Interface
Primary Timing Source G.703
G.703 Port
CRC-4 Mode Enabled
Idle Code FF
Data Rate / # of TSs 1536 kbps / 24
Beginning TS 1
Match the CRC-4 mode at each interface to the actual type of data present at that node in the
system. Otherwise CRC-4 data will not
be transparently transmitted in CRC-4 disabled mode.
Also, non-CRC-4 data generates an LFA alarm in CRC-4 enabled mode.