PNI ASIC - Manual (Page 11)

PNI ASIC
Host Processor Interface
Idle Mode
The PNI ASIC does not initialize in the idle mode at power-up. The PNI ASIC must be in a data-ready state for the
idle mode to occur. After power-up the PNI ASIC can be brought to the data-ready state by following these steps for
sending a read command to the PNI ASIC.
1. Set SSNOT low.
2. Pulse the RESET line.
3. Send a command to the PNI ASIC to measure one of the sensors.
4. Once the SSNOT pin is set to high again the PNI ASIC will go into the low power idle mode.
5. The DRDY pin will eventually go high signifying that the PNI ASIC is in the data-ready state. The resultant
data does not have to be read from the PNI ASIC.
Magnetic Measurements
The magnetic sensor operates in an oscillator circuit composed of the external bias resistors along with digital gates
and a comparator internal to the PNI ASIC. Only one sensor can be measured at a time. To measure a sensor, send a
command byte to the PNI ASIC through the SPI port specifying the sensor axis to be measured. After dividing by
the ratio set by PS2. PS1, and PSO, the PNI ASIC will return the result of a complete forward and reverse bias
measurement of the sensor in a 16-bit 2’s compliment format. The range is
– 32768 to 32767.
Command Byte
The operation of the PNI ASIC is controlled by the data received into the SPI port. The command byte syntax is as
follows:
Table 10: Command Byte Syntax
Position 7 6 5 4 3 2 1 0
Bit DHST PS2 PS1 PS0 ODIR MOT ASI ASO
RESET 0 0 0 0 0 0 0 0
DHST – High Speed Oscillator Test
When high, the internal high speed clock is set to drive the DHST pad at ½ the clock speed. When low, the
DHST pad is set to DVDD. This is used for debug purposes only, and will not be set in normal operation
PNI Corporation 133 Aviation Blvd., Suite 101, Santa Rosa, CA 95403‐1084 USA;, Fax: (707) 566‐2261
For the most current specifications, please visit our website at:
www.pnicorp.com
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