Overrange and overflow, Block transfer programming – Rockwell Automation 1771-QRD PULS FLOWMTR User Manual

Page 20

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Module Programming

Chapter 4

4–2

Word 0 (1000) is the header code that identifies the data source as a
1771–QRD module. When the module is active, it also contains the status
of the overrange and overflow flags. Overrange and overflow are discussed
in more detail in the next section of this chapter. Word #1 contains the rate
of the signal on channel 1; word #2 contains the total number of pulses
received on channel 1. Word #3 contains the rate of the signal on channel
2; word #4 contains the total number of pulses received on channel 2.
Word #5 contains the rate of the signal on channel 3; word #6 contains the
total number of pulses received on channel 3. And finally, words #7 and #8
contain the rate and total number of pulses received on channel 4,
respectively.

The 1771–QRD processes input signals at a maximum rate of 10.0kHz. If
the rate of the incoming signal on any channel is greater than 10.0 kHz, the
red FAULT indicator will illuminate, revealing an overrange. At the same
time, a bit will be set in the acknowledge word (word 0), showing the
channel(s) whose rate is in an overrange condition. The red FAULT light
will extinguish only when the frequency of the input that is causing the
overrange is reduced to less than 10.0 kHz. At that time, the FAULT light
will go out, and the overrange flag for that channel will automatically be
reset. Overrange rates are reported as zero values, and cause their totalizers
to reset to zero.

The 1771–QRD also acts as a totalizer for each of the channels. Each of
the totalizers is capable of counting up to 32,767. When this number is
reached by any of the totalizers, an overflow flag for that channel is set in
the acknowledge word. The counter will again start from zero and continue
to count, with the overflow flag set. These flags can be detected by the
processor, and any or all of them can be reset using a Block Transfer Write
command. Examples of the detection and handling of overflow conditions
with a BTW command are discussed further in Chapter 5.

The following sections show how to program and set up typical
programmable controllers for use with the 1771–QRD Module. In each
example, the switch settings for all of the processors and adapters used are
given, as well as the backplane settings for the I/O chassis. Note that 2-slot
addressing is used in all of these examples, but the 1771–QRD will
function with any type of addressing (2-slot, 1-slot, 1/2-slot).

Overrange and Overflow

Block Transfer Programming

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