2 specifications – CH Tech EM405D User Manual

Page 8

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2

1.2.2 Specifications

MAXIMUM RATINGS

Parameter

Condition

Rating

Units

Operating Temperature

0 to +60

C

Non-Operating Temperature

-40 to +75

C

Humidity

non-condensing

5 to 95

%

Input DC Power Level

12.6

V max.

Power Consumption

Support for two M-modules at full power

30

Watts

External Trigger Input

Power Off
Power On

± 40
± 36

V
V


CHARACTERISTICS

Limit

Parameter

Conditions

Min

Typ.

Max

Units

Data Transfers

Throughput

Wired Ethernet

– block read

1, 3

Wired Ethernet

– block write

2, 3

Wireless Ethernet

– block read

1, 3

Wireless Ethernet

– block write

2, 3

90K
40K

23K

14K

bytes/sec
bytes/sec

bytes/sec

bytes/sec

Input Power Supply

Level

DC

11.4

12.0

12.6

V

Current

for full M-module support

2.5

A

Ripple/noise

20MHz bandwidth

-1.5

+1.5

%

Power Consumption

Carrier

-0001 wired Ethernet

-0002 wireless Ethernet

460

500

470

510

550

590

mA

mA

M-modules (each position)

+5V

+12V

-12V

1.0

200

200

A

mA

mA

Triggers

Output Level

into a high impedance load

3.8

5.0

5.4

V

Output Impedance

50

Input Level

TLVL = 0

4

TLVL = 1

2.5

1.4

V

V

Input Impedance

TIMP = 0

4

TIMP = 1

100K

50

External Trigger Delay

External connector to M-module

M-module to external connector

M-module to M-module

30

30

30

40

40

40

ns

ns

ns

Cooling

Temperature Rise

20

°C

Temperature Accuracy

-2

+2

°C

Notes:

1. 12-24ms latency occurs on each command issued. The effect of this latency is reduced by transferring

large amounts of data with a single block read command. Maximum read throughput is achieved by
reading >64K bytes of data from a FIFO type register on an M-module using the Block Read
command. Host software may vary and can limit the maximum throughput.

2. The maximum number of bytes that can be written in a single block write command is 1024.
3. Ethernet is a non-deterministic communications interface. Realized throughput may be significantly

degraded by network activity or other factors that may affect network performance.

4. TLVL and TIMP refer to register bits in the Reset & Trigger Control register. Refer to section 4.3.5.

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