Kontron VM62 - Manual (Page 29)

Chapter 2 Functional Description VM62(A) / VM42(A) User’s Manual
N o t e s
Reserved Pins
1) On a standard VM62(A)/VM42(A) board, these signals are already used for UART ports at BU7 and BU8.
2) On a standard VM62(A)/VM42(A) board, these signals are used for SPI to which the EEPROM is already
connected. PB0 is chip select of the EEPROM.
3) On PA13, a 24 MHz clock signal is routed via jumper J6. This signal is always needed for PEP standard
software (serial drivers).
Dual Functioning Signal Pins
4) These signals are routed both to the base board SI Interface connector (ST5C) and the CXC connector and can
only be used by one or the other and not both at the same time.
Due to this, a conflict exists if the SCC4 port is to be used with the SI232 piggyback and CXC boards (such as
CXM-SIO3), as both boards access this port. The SCC4 port can, therefore, not be used at the same time by SI
piggybacks and CXC boards.
The CXC ports SER1, SER2 and SER3 are equivalent to ports SCC2, SCC3 and SCC4 resp. on the 68xx360.
With regard to special CXC capabilities, the CXC pinout on the VM62(A) / VM42(A) has been developed to provide
maximum compatibility between the standard CXC functions. In addition, all signals are available in order to configure 2
time division multiplexed channels via the CXC (ISDN, PCM, GCI and so on). Multi-function pins with incompatible
functions with regard to the 68302 and 68EN360 (called user defined in the generic CXC specification) are not part of the
VM42(A) / VM62(A) CXC specification.
Although the SMCs are configured on the base board, these ports are also integrated on the CXC. This is because of
possible ISDN applications where SMCs can be integrated and other protocols supported by the 68EN360.
Note
If the RCLK2 signal (CXM pin c16) is required, jumper J6 (24 MHz clock) must be opened and the
serial drivers delivered by PEP modified.
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