Compaq 4000N - Manual (Page 10)

Technical Reference Guide
Compaq Deskpro 4000N and 4000S Personal Computers
First Edition – September 1997
viii
LIST OF FIGURES
F IGURE 2–1. C OMPAQ D ESKPRO 4000S P ERSONAL C OMPUTER WITH M ONITOR ....................................... 2-1
F IGURE 2–2. C ABINET L AYOUT , F RONT V IEW ....................................................................................... 2-4
F IGURE 2–3. C ABINET L AYOUT , R EAR V IEW ......................................................................................... 2-5
F IGURE 2–4. C HASSIS L AYOUT , T OP V IEW ............................................................................................ 2-6
F IGURE 2–5. S YSTEM B OARD L AYOUT , C OMPONENT S IDE ..................................................................... 2-7
F IGURE 2–6. C OMPAQ D ESKPRO 4000N AND 4000S S YSTEM A RCHITECTURE , B LOCK DIAGRAM .............. 2-9
F IGURE 2–7. M ICROPROCESSOR A RCHITECTURAL D IAGRAM ................................................................ 2-10
F IGURE 3–1. P ROCESSOR /M EMORY S UBSYSTEM A RCHITECTURE ............................................................ 3-2
F IGURE 3–2. P ENTIUM MMX M ICROPROCESSOR I NTERNAL A RCHITECTURE ........................................... 3-3
F IGURE 3–3. S YSTEM M EMORY M AP ....................................................................................................... 3-7
F IGURE 4–1. PCI B US D EVICES AND F UNCTIONS ..................................................................................... 4-2
F IGURE 4–2. 32-B IT PCI B US C ONNECTOR (32-B IT T YPE ) ..................................................................... 4-3
F IGURE 4–3. T YPE 0 C ONFIGURATION C YCLE ........................................................................................ 4-6
F IGURE 4–4. PCI C ONFIGURATION S PACE M AP ...................................................................................... 4-7
F IGURE 4–5. ISA B US B LOCK D IAGRAM ................................................................................................ 4-11
F IGURE 4–6. ISA E XPANSION C ONNECTOR .......................................................................................... 4-12
F IGURE 4–7. M ASKABLE I NTERRUPT P ROCESSING , B LOCK D IAGRAM .................................................... 4-18
F IGURE 4–8. C ONFIGURATION M EMORY M AP ...................................................................................... 4-24
F IGURE 5–1. 40-P IN IDE C ONNECTOR . ................................................................................................. 5-8
F IGURE 5–1. 50-P IN IDE C ONNECTOR . ................................................................................................. 5-9
F IGURE 5–2. 34-P IN D ISKETTE D RIVE C ONNECTOR .............................................................................. 5-14
F IGURE 5–3. S ERIAL I NTERFACES B LOCK D IAGRAM ............................................................................. 5-15
F IGURE 5–4. S ERIAL I NTERFACE C ONNECTOR (M ALE DB-9 AS VIEWED FROM REAR OF CHASSIS ) ........... 5-15
F IGURE 5–5. P ARALLEL I NTERFACE C ONNECTOR (F EMALE DB-25 AS VIEWED FROM REAR OF CHASSIS ) .. 5-27
F IGURE 5–6. 8042-T O -K EYBOARD T RANSMISSION OF C ODE ED H , T IMING D IAGRAM ............................ 5-28
F IGURE 5–7. K EYBOARD OR P OINTING D EVICE I NTERFACE C ONNECTOR ............................................... 5-34
F IGURE 5–8. E THERNET I NTERFACE B LOCK D IAGRAM ......................................................................... 5-35
F IGURE 5–9. E THERNET AUI C ONNECTOR (DB-15, VIEWED FROM REAR ) ............................................. 5-36
F IGURE 5–10. E THERNET RJ-45 C ONNECTOR ...................................................................................... 5-36
F IGURE 5–11. U NIVERSAL S ERIAL B US C ONNECTOR ( ONE OF TWO AS VIEWED FROM REAR OF CHASSIS )... 5-38
F IGURE 6–1. S3 T RIO 64V2/GX-B ASED G RAPHICS S UBSYSTEM , B LOCK DIAGRAM ................................... 6-2
F IGURE 6–2. VGA M ONITOR C ONNECTOR , (F EMALE DB-15, AS VIEWED FROM THE REAR OF CHASSIS ). ... 6-6
F IGURE 7–1. P OWER S UPPLY A SSEMBLY , B LOCK D IAGRAM .................................................................... 7-1
F IGURE 7–2. P OWER C ABLE D IAGRAM .................................................................................................. 7-4
F IGURE 7–3. L OW V OLTAGE S UPPLY , B LOCK D IAGRAM ......................................................................... 7-5
F IGURE 7–4. S IGNAL D ISTRIBUTION D IAGRAM ....................................................................................... 7-6
F IGURE C–1. K EYSTROKE P ROCESSING E LEMENTS , B LOCK D IAGRAM ....................................................C-2
F IGURE C–2. K EYBOARD -T O -S YSTEM T RANSMISSION OF C ODE 58 H , T IMING D IAGRAM ..........................C-3
F IGURE C–3. U.S. E NGLISH (101-K EY ) K EYBOARD K EY P OSITIONS .......................................................C-4
F IGURE C–4. N ATIONAL (102-K EY ) K EYBOARD K EY P OSITIONS ............................................................C-4
F IGURE C–5. U.S. E NGLISH W INDOWS (101W-K EY ) K EYBOARD K EY P OSITIONS ...................................C-5
F IGURE C–6. N ATIONAL W INDOWS (102W-K EY ) K EYBOARD K EY P OSITIONS ........................................C-5
F IGURE C–7. U.S. E NGLISH W INDOWS (101WE-K EY ) K EYBOARD K EY P OSITIONS .................................C-6
F IGURE C–8. N ATIONAL W INDOWS (102WE-K EY ) K EYBOARD K EY P OSITIONS ......................................C-6
F IGURE C–9. S CANNER E LEMENTS , B LOCK D IAGRAM ..........................................................................C-14
F IGURE C–10. S CANNER OPERATION F LOW C HART ..............................................................................C-16