ADLINK DAQe-2006 - Manual (Page 70)

58 Operation Theory
GPTC_UPDOWN input controls whether the counter counts up or
down. The GPTC_GATE input is a control signal which acts as a
counter enable or a counter trigger signal under different applica-
tions.
The output of timer/counter is GPTC_OUT. After power-up,
GPTC_OUT is pulled high by a pulled-up resister about 10K
ohms. Then GPTC_OUT goes low after the DAQ-/DAQe-/PXI-
2016/2010/2006/2005 card is initialized.
All the polarities of input/output signals can be programmed by
software. In this chapter, for easy explanation, all GPTC_CLK,
GPTC_GATE, and GPTC_OUT are assumed to be active high or
rising-edge triggered in the figures.
General Purpose Timer/Counter modes
Eight programmable timer/counter modes are provided. All modes
start operating following a software-start signal that is set by the
software. The GPTC software reset initializes the status of the
counter and re-loads the initial value to the counter. The operation
remains halted until the software-start is re-executed. The operat-
ing theories under different modes are described as below.
Mode 1: Simple Gated-Event Counting
In this mode, the counter counts the number of pulses on the
GPTC_CLK after the software-start. Initial count can be loaded
from software. Current count value can be read-back by soft-
ware any time without affecting the counting. GPTC_GATE is
used to enable/disable counting. When GPTC_GATE is inac-
tive, the counter halts the current count value. Figure 4-23 illus-
trates the operation with initial count = 5, countdown mode.
Figure 4-23: Mode 1 Operation