Interrupts, Interrupt sources, 153 for more in – Echelon Neuron C User Manual

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Neuron C Programmer’s Guide

153

device, so events can be processed only through direct event processing. Neither

network variable updates, nor messages, are sent because the device is
unconfigured. Timer objects can be set and read within the wink task (unless the

device is unconfigured, in which case you can use the delay( ) function). You also

can explicitly check the timer_expires( ) event as long as you first call
post_events( ).

Interrupts

Series 5000 chips provide a number of hardware interrupts that are available to

a Neuron C application. At higher system clock rates, these interrupts run in a
dedicated processor on the chip, the interrupt service routine (ISR) processor. At

the lowest system clock rates (5 MHz and 10 MHz), these interrupts run in the
same processor as the Neuron C application, the application (APP) processor.

Running interrupts in their own ISR processor provides higher performance for

both the interrupt routines and the Neuron C application.

In addition, Series 5000 chips provide other hardware interrupts, such as those

related to the SCI UART or SPI I/O models, that are automatically handled by

the Neuron firmware and are not available to a Neuron C application.

This section describes the hardware interrupts that are available to a Neuron C

application.

Interrupt Sources

The hardware interrupt support provides the following interrupt sources for
application use:

• I/O interrupts
• Timer/counter interrupts
• Periodic system timer interrupts

The Neuron firmware, version 18 and later, combined with an application-specific

interrupt dispatcher automatically generated by the compiler, identifies the

interrupt source, manages the interrupt management flags, and calls the correct
application-specific interrupt task for each interrupt request. Interrupts are

dispatched in the order of source code declaration, so that interrupt tasks that

require the lowest latency and smallest jitter should be declared first, and
interrupt tasks that are least sensitive to latency and jitter should be declared

last.

The Series 5000 chips also supply one binary semaphore to support synchronized

access to shared resources between the application and the ISR processor. A

Neuron C application uses the __lock keyword to access this semaphore and
synchronize access to shared resources. See the

Neuron C Reference Guide

for

more information about this keyword, and see

Sharing Data with an Interrupt

Task

on page 161 for more information about using the semaphore.

Network I/O is not allowed from within an interrupt task, but your interrupt task

can access I/O devices and variables shared with the application.
In addition, you cannot use the NodeBuilder Debugger to set break points within
an interrupt task. See

Debugging Interrupt Tasks

on page 164 for suggestions

about how to debug an interrupt task.

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