Usage tip for memory-mapped i/o – Echelon Neuron C User Manual

Page 210

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198 Memory

Management

If explicit addressing is used for network variables:

C = max(34, 19 + sizeof(largest NV))

The application input buffer must be sized to accommodate incoming

responses in addition to other incoming messages.

D. receive_trans_count default

If explicit messages are received by the application program:

D = max(8, min (16, # of non-config input NVs + 2))

If explicit messages are not received by the application program:

D = min(16, # of non-config input NVs + 2)

E. app_buf_out_count, app_buf_out_priority_count, net_buf_out_count, and
net_buf_out_priority_count defaults

If the application is linked for a Neuron 3120 Chip or a Neuron 3120E1 Chip:
E = 1

If the application is linked for any other Neuron Chip or Smart Transceiver:
E = 2
When priority buffer counts are set to zero, all network variables are marked
as non-priority nonconfig. If app_buf_out_priority_count or

net_buf_out_priority_count is non-zero, then both must be non-zero, and two

transmit transaction buffers are automatically allocated in RAM. If there are
no priority output buffers, then only one transmit transaction buffer is

allocated. The size of a transmit transaction buffer is 28 bytes (in versions 4,
6, and later, of the Neuron firmware), and 18 bytes (in earlier versions).

The Neuron C compiler determines that a program uses explicit addressing if it

references any of the following:

msg_in.addr

resp_in.addr

msg_out.dest_addr
nv_in_addr

Usage Tip for Memory-Mapped I/O

You can attach memory-mapped I/O devices to a Neuron 3150 Chip or FT 3150

Smart Transceiver. You cannot use memory mapped I/O with Series 5000 chips,
but you can expand the I/O capabilities of all Neuron Chips and Smart

Transceivers by accessing a peripheral I/O device using one of the supported I/O

models, such as an SPI PIO device.

Memory-mapped devices should respond only to memory addresses that are

outside the configured memory map areas for ROM, EEPROM, and RAM.

A convenient method of access to memory-mapped I/O from a Neuron C program

is to declare a constant pointer to the block of control addresses for the device. In

the following example, a hypothetical memory-mapped I/O device has two control
registers and a 16-bit data register, at addresses

x

,

x

+

1

,

x

+

2

, and

x

+

3

,

respectively. The device is connected to respond to the addresses of 0x8800 to

0x8803. The fragment of Neuron C code below accesses the device.

typedef struct {

unsigned short int

controlReg1;

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