Defining a timer/counter interrupt task, N in table 10 on pag – Echelon Neuron C User Manual

Page 168

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156 Additional

Features

Table 10. I/O Interrupt Triggers

Trigger Type

Example Interrupt Specification

Positive level (default declaration)

IO_0

Positive level (explicit declaration)

IO_0, +

Negative level

IO_0, -

Falling edge

IO_0, clockedge(-)

Rising edge

IO_0, clockedge(+)

Both rising and falling edge

IO_0, clockedge(+-)

Example:

interrupt (IO_0, clockedge(+)) { // rising edge of IO_0
...
}

interrupt (IO_5,-) {

// neg. level @ IO_5

...
}

interrupt (IO_6) {

// pos. level @ IO_6

...
}

Important: For a single pin, you cannot combine a dual-edge interrupt trigger
(“clockedge(+-)”) with a falling-edge trigger (“clockedge(-)”), because the hardware

would interpret the combination as two dual-edge triggered interrupts. The

Neuron C compiler issues error NCC#586 when it encounters such a
configuration.

Defining a Timer/Counter Interrupt Task

You define a timer/counter interrupt task by referencing a timer/counter I/O

object. Up to two timer/counter interrupt tasks are supported.

Referring to a different I/O model yields compiler error NCC#576, and attempts

to declare more than two timer/counter interrupts yield compiler error NCC#576.

When a timer/counter interrupt task completes, the system firmware clears the

interrupt source, so a when(io_update_occurs()) task cannot process the same

timer/counter update that the interrupt task already processed. You can make
calls to the io_in() function from within the interrupt task, if measurements are

required, and you can share those measurements with the remaining application

through global variables.

The following timer/counter I/O models that are supported as timer/counter

interrupt sources:

• Dualslope Input
• Edgedivide Output

• Edgelog Input
• Frequency Output

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