Altera Audio Video Development Kit, Stratix IV GX Edition - Manual (Page 32)

6–10 Chapter 6: Board Test System
Using the Board Test System
Audio Video Development Kit, Stratix IV GX Edition User Guide © November 2009 Altera Corporation
The following sections describe the controls on the DDR3 tab.
Port
The Port control directs communication to one of two DDR3 memory ports on your
board. A 16-bit interface connects to the top bank of the Stratix IV GX FPGA and a 64-
bit interface connects to the bottom banks of the FPGA.
Start
The Start control initiates DDR3 memory transaction performance analysis.
Stop
The Stop control terminates transaction performance analysis.
Performance Indicators
These controls display current transaction performance analysis information collected
since you last pressed Start:
Figure 6–5. The DDR3 Tab