Artesyn MVME4100 Single Board Computer Installation and Use (June 2014) - Manual (Page 113)

MOTLoad Firmware
MVME4100 Single Board Computer Installation and Use (6806800H18G) 113
6.7.3 User Images
These images are user-developer boot code; for example, a VxWorks bootrom image. Such
images may expect the system software state to be as follows upon entry:
 The MMU is disabled.
 L1 instruction cache has been initialized and is enabled.
 L1 data cache has been initialized (invalidated) and is disabled.
 L2 cache is disabled.
 L3 cache is disabled.
 RAM has been initialized and is mapped starting at CPU address 0.
 If RAM ECC or parity is supported, RAM has been scrubbed of ECC or parity errors.
 The active flash bank (boot) is mapped from the upper end of the address space.
 If specified by COPY_TO_RAM, the image has been copied to RAM at the address specified
by ImageRamAddress.
 CPU register R1 (the stack pointer) has been initialized to a value near the end of RAM.
 CPU register R3 is added to the following structure:
typedef struct altBootData {
unsigned int ramSize;/* board's RAM size in MB */
void flashPtr;/* ptr to this image in flash */
char boardType[16];/* name string, eg MVME4100 */
void globalData;/* 16K, zeroed, user defined */
unsigned int reserved[12];
} altBootData_t;
6.7.4 Alternate Boot Data Structure
The globalData field of the alternate boot data structure points to an area of RAM which was
initialized to zeroes by the boot loader. This area of RAM is not cleared by the boot loader after
execution of a POST image, or other alternate boot image, is executed. It is intended to provide
a user a mechanism to pass POST image results to subsequent boot images.
The boot loader performs no other initialization of the board than that specified prior to the
transfer of control to either a POST, USER, or Alternate MOTLoad image. Alternate boot images
need to initialize the board to whatever state the image may further require for its execution.