Sundance SMT148FX - Manual (Page 9)

4.1.5 LVDS Isolators
48 single ended signals are connected from the Virtex 4 to LVDS drivers and
receivers (SN65LVDS390/1) via galvanic isolators (type IL715-3). The transmitter
part is enabled via control signals. The LVDS outputs are arranged in groups of 6.,
hence there are 8 control signals. The LVDS receivers are enabled continuously.
The isolation provided is up to 150V rms maximum.
The isolation provided is up to 150V rms, whilst still enabling a baud rate of up to
100Mbps.
The LVDS transmitters and receivers are external to the FPGA itself. The devices
used are SN65LVDS390 and 391.
LVDS driver
LVDS receiver
100 Ohm
termination
resistor
Differential output
to D-connector
Differential input
from D-connector
TX+
TX-
RX+
RX-
LVTTL input from
FPGA
LVTTL output to
FPGA
Output Enable
(goes to 3 drivers)
LVTTL input from
FPGA
The IL715-3 galvanic isolators require a simple initialisation sequence
before use. Simply toggle the driving pins from the FPGA to the IL715-3
devices at start-up.
User Manual SMT148FX Page 9 of 48 Last Edited: 03/08/2009 11:42:00