Otp rom 4.16 timing diagrams – ELAN Home Systems EM78P458 User Manual

Page 55

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EM78P458/459

OTP ROM

4.16 Timing Diagrams

RESET Tim ing (CLK="0")

CLK

/RESET

NO P

Instruction 1

Executed

Tdrh

TCC Input Tim ing (CLKS="0")

CLK

TCC

Ttcc

Tins

AC Testing : Input is driven at 2.4V for logic "1",and 0.4V for logic "0".Tim ing m easurem ents are

m ade at 2.0V for logic "1",and 0.8V for logic "0".

AC Test Input/Output W aveform

2.4

0.4

2.0

0.8

TEST POINTS

2.0

0.8

This specification is subject to change without prior notice. 07.01.2003 (V1.3)

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