FUJITSU MHV2160BT User Manual
Page 188
Interface
5-112
C141-E239
*14 WORD 79
Bits 15-7: Reserved
Bit 6:
'1' = Enables the software settings preservation.
Bit 5:
Reserved
Bit 4:
'1' = Enables the in-order data delivery.
Bit 3:
'1' = Enables the Power Management initiation function from Bit
2:
'1' = Enables the Auto-Activate optimization function in the
DMA Setup FIS.
Bit 1:
'1' = Enables the non-zero buffer offset function in the DMA
Setup FIS.
Bit 0:
Reserved
*15 WORD 80
Bits 15-8: Reserved
Bit 7:
'1' = ATA/ATAPI-7 supported
Bit 6:
'1' = ATA/ATAPI-6 supported
Bit 5:
'1' = ATA/ATAPI-5 supported
Bit 4:
'1' = ATA/ATAPI-4 supported
Bit 3:
'1' = ATA-3 supported
Bit 2:
'1' = ATA-2 supported
Bits 1-0:
Undefined
*16 WORD 82
Bit 15:
Undefined
Bit 14:
'1' = Supports the NOP command.
Bit 13:
'1' = Supports the READ BUFFER command.
Bit 12:
'1' = Supports the WRITE BUFFER command.
Bit 11:
Undefined
Bit 10:
'1' = Supports the Host Protected Area feature set.
Bit 9:
'1' = Supports the DEVICE RESET command.
Bit 8:
'1' = Supports the SERVICE interrupt.
Bit 7:
'1' = Supports the release interrupt.