Freescale Semiconductor M9328MX21ADSE - Manual (Page 15)

Configuration and Operation
M9328MX21ADSE User’s Manual, Rev. A
Freescale Semiconductor 2-5
Figure 2-4. Burst Flash Interface
Figure 2-5. SDRAM Interface
2.3.3 Memory Map
Table 2-4 shows the memory map for external peripherals on the ADS board. Because the Burst Flash and
the Ethernet Controller do not take up the entire address space of the associated chip selects, software can
access the same physical memory location at more than one range of addresses. For instance, SDRAM uses
DQM3_EB3
A2...A24
D0.15
FLASH_RST RESET
A0...A22
D0..15
8MX16-Bit Burst Flash
CS
ACC
WP
WE
8MX16-Bit Burst Flash
CS0
V
CC
CLK
OE
AVD BCLK
LBA
OE
D0.15 D16..31
WE DQM1_EB1
RDY ECB
V
CC
V
CC
RAS
CAS
DQM1_EB1
WE
A2..A18
D0..15
SDCKE0
SDCLK
DQM0_EB0
RAS
CAS
UDQM
WE
A0..10
D0..15
16MX16-Bit SDRAM
CS
CLK
CKE
LDQM
16MX16-Bit SDRAM
CS2
V
CC
A11
BA0
BA1 BA0
A20
A19
D0..15 D16..31
UDQM
LDQM DQM3_EB3
DQM2_EB2