Freescale Semiconductor M9328MX21ADSE User Manual

Page 42

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Support Information

M9328MX21ADSE User’s Manual, Rev. A

3-14

Freescale Semiconductor

32

D13

DATA BIT 13 — Bidirectional data bit from the processor

33

D1

DATA BIT 1 — Bidirectional data bit from the processor

34

D14

DATA BIT 14 — Bidirectional data bit from the processor

35

D0

DATA BIT 0 — Bidirectional data bit from the processor

36

D15

DATA BIT 15 — Bidirectional data bit from the processor

37

DQM1_EB1_B

ENABLE BYTE 1 — D23-D16 for SDRAM, D15-D8 for other memory types

38

SDCLK

SDRAM CLOCK — Main clock signal to SDRAM devices

39

DQM0_EB0_B

ENABLE BYTE 0 — D31-D24 for SDRAM, D7-D0 for other memory types

40

A18

ADDRESS BIT 18 — Output line for addressing external devices

41

SDCKE0

SDRAM CLOCK ENABLE 0 — Active high outputs to SDRAM

42

A17

ADDRESS BIT 17 — Output line for addressing external devices

43

MA10

MULTIPLEXED ADDRESS BIT 1O — Multiplexed address bit to SDRAM

44

A10

ADDRESS BIT 10 — Output line for addressing external devices

46

A9

ADDRESS BIT 9 — Output line for addressing external devices

47

A16

ADDRESS BIT 16 — Output line for addressing external devices

48

A7

ADDRESS BIT 7 — Output line for addressing external devices

49

A14

ADDRESS BIT 14 — Output line for addressing external devices

50

A6

ADDRESS BIT 6 — Output line for addressing external devices

52

A8

ADDRESS BIT 8 — Output line for addressing external devices

53

A15

ADDRESS BIT 15 — Output line for addressing external devices

54

A11

ADDRESS BIT 11 — Output line for addressing external devices

55

A13

ADDRESS BIT 13 — Output line for addressing external devices

56, 59

P5V

Switched +5 VDC power

57

A12

ADDRESS BIT 12 — Output line for addressing external devices

58

OE_B PC_IOWR

PCMCIA IO WRITE— Active low output for I/O writes*

60

ECB_B

END CURRENT BURST — Active low input signal asserted by external burst devices

* The signal name in italics is the function intended for operation with this connector. It is multiplexed inside the i.MX21
processor with the listed signal.

Table 3-3. CPU to Option Card PK1 Connector Signals

Pin(s)

Signal

Description

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