Intel iEi Motherboard A300 - Manual (Page 137)

A300 Motherboard
The Configure DRAM Timing by SPD option determines if the system uses the SPD
(Serial Presence Detect) EEPROM to configure the DRAM timing. The SPD EEPROM
contains all necessary DIMM specifications the including speed of the individual
components such as CAS and bank cycle time as well as valid settings for the module and
the manufacturer's code. The SPD enables the BIOS to read the spec sheet of the DIMMs
on boot-up and then adjust the memory timing parameters accordingly.
Disabled DRAM timing parameters can be manually set using
the DRAM sub-items
Enabled (Default) DRAM timing parameter are set according to the
DRAM Serial Presence Detect (SPD)
The Configure DRAM Timing by SPD option is disabled, the following configuration
options appear.
DRAM CAS# Latency [2.5]
DRAM RAS# Precharge [3 clocks]
DRAM RAS# to CAS# Delay [3 clocks]
DRAM Precharge Delay [7 clocks]
DRAM Burst Length [8]
Memory Hole [Disabled]
The Memory Hole reserves the memory space between 15MB and 16MB for ISA
expansion cards that require a specified area of memory to work properly. If an older ISA
expansion card is used, please refer to the documentation that came with the card to see if
it is necessary to reserve the space.
Disabled (Default) Memory is not reserved for ISA expansion cards
15M– 16M Memory is reserved for ISA expansion cards
Init. Graphic Adapter Priority [PCI/Int-VGA ]
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