Channelized stm1 to e1 pic – Juniper Networks M20 User Manual

Page 17

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Channelized STM1 to E1 PIC

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JUNOS 4.4 and later

Software release

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Four E3 ports

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Power requirement: 0.32 A/48 V @ 15.3 W

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63 E1 channels

Description

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Each E1 channel supports a single High-level Data Link Control (HDLC) framer that can
be configured for speeds from DS0 (64 Kbps) through full E1 (2 Mbps) in 64-Kbps
increments

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Onboard DSU functionality for E1 and fractional E1 connectivity

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Integrated support for G.703 and unframed mode and G.704 framed mode with CRC;
this feature is user-configurable

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Configurable clock source: Internal or loop

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Per-port loop timing

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Rate limiting on input and output

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NxE1 service with Multilink Point-to-Point Protocol (MLPPP, RFC 1990) delivered by the
Link Services and Multilink Services PICs

Hardware features

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SDH mapping:

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Tributary Unit Group 3 (TUG-3)

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E1 support:

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Full instrumentation per E1 channel

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Integrated support for G.703 unframed mode and G.704 framed mode

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4-bit CRC for G.704 framed mode

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HDB3 coding

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Local E1 line loopback and remote line loopback

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Per-channel BERT testing

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Encapsulations:

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Cisco High-level Data Link Control (HDLC)

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Frame Relay

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Multiprotocol Label Switching (MPLS) circuit cross-connect (CCC)

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MPLS translational cross-connect (TCC)

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Point-to-Point Protocol (PPP)

Software features

Channelized STM1 to E1 PIC

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Channelized STM1 to E1 PIC

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