6 system control and status registers (scsr), 4 dma controller (dmac), 1 dma controller architecture – SMSC LAN9420 User Manual

Page 38: 2 data descriptors and buffers, System control and status registers (scsr), Dma controller (dmac) 3.4.1, Dma controller architecture, Data descriptors and buffers, Dma controller (dmac)

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6 system control and status registers (scsr), 4 dma controller (dmac), 1 dma controller architecture | 2 data descriptors and buffers, System control and status registers (scsr), Dma controller (dmac) 3.4.1, Dma controller architecture, Data descriptors and buffers, Dma controller (dmac) | SMSC LAN9420 User Manual | Page 38 / 169 6 system control and status registers (scsr), 4 dma controller (dmac), 1 dma controller architecture | 2 data descriptors and buffers, System control and status registers (scsr), Dma controller (dmac) 3.4.1, Dma controller architecture, Data descriptors and buffers, Dma controller (dmac) | SMSC LAN9420 User Manual | Page 38 / 169
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