SMSC LAN9420 - Manual (Page 16)

Single-Chip Ethernet Controller with HP Auto-MDIX Support and PCI Interface
Datasheet
Revision 1.22 (09-25-08) 16 SMSC LAN9420/LAN9420i
DATASHEET
2.1 Pin List
Table 2.1 PCI Bus Interface Pins
NUM
PINS
NAME SYMBOL
BUFFER
TYPE DESCRIPTION
1 PCI Clock In PCICLK IS PCI Clock In: 0 to 33MHz PCI Clock Input.
1 PCI Frame nFRAME IPCI/
OPCI
PCI Cycle Frame
32 PCI Address
and Data Bus
AD[31:0] IPCI/
OPCI
PCI Address and Data Bus
1 PCI Reset PCInRST IS PCI Reset
4 PCI Bus
Command and
Byte Enables
nCBE[3:0] IPCI/
OPCI
PCI Bus Command and Byte Enables
1 PCI Initiator
Ready
nIRDY IPCI/
OPCI
PCI Initiator Ready
1 PCI Target
Ready
nTRDY IPCI/
OPCI
PCI Target Ready
1 PCI Stop nSTOP IPCI/
OPCI
PCI Stop
1 PCI Device
Select
nDEVSEL IPCI/
OPCI
PCI Device Select
1 PCI Parity PAR IPCI/
OPCI
PCI Parity
1 PCI Parity
Error
nPERR IPCI/
OPCI
PCI Parity Error
1 PCI System
Error
nSERR IPCI/
OPCI
PCI System Error
1 PCI Interrupt nINT OPCI PCI Interrupt
Note: This pin is an open drain output.
1 PCI IDSEL IDSEL IPCI PCI IDSEL
1 PCI Request nREQ OPCI PCI Request
Note: This pin is a tri-state output.
1 PCI Grant nGNT IPCI PCI Grant
1 PCI Power
Management
Event
nPME OPCI PCI Power Management Event
Note: This pin is an open drain output.
1 Power Good PWRGOOD IS
(PD)
PCI Bus Power Good: This pin is used to sense the
presence of PCI bus power during the D3 power
management state.
Note: This pin is pulled low through an internal pull-
down resistor
1 V
AUX
Detection VAUXDET IS
(PD)
PCI Auxiliary Voltage Sense: This pin is used to sense
the presence of a 3.3V auxiliary supply in order to define
the PME support available.
Note: This pin is pulled low through an internal pull-
down resistor