SMSC LAN9420 - Manual (Page 19)

Single-Chip Ethernet Controller with HP Auto-MDIX Support and PCI Interface
Datasheet
SMSC LAN9420/LAN9420i 19 Revision 1.22 (09-25-08)
DATASHEET
Table 2.5 PLL and Ethernet PHY Pins
NUM
PINS
NAME SYMBOL
BUFFER
TYPE DESCRIPTION
1
Crystal Input XI ICLK Crystal Input: External 25MHz crystal input. This pin
can also be driven by a single-ended clock oscillator.
When this method is used, XO should be left
unconnected.
1
Crystal
Output
XO OCLK Crystal Output: External 25MHz crystal output.
1
Ethernet TX
Data Out
Negative
TPO- AIO Ethernet Transmit Data Out Negative: The transmit
data outputs may be swapped internally with receive
data inputs when Auto-MDIX is enabled.
1
Ethernet TX
Data Out
Positive
TPO+ AIO Ethernet Transmit Data Out Positive: The transmit
data outputs may be swapped internally with receive
data inputs when Auto-MDIX is enabled.
1
Ethernet RX
Data In
Negative
TPI- AIO Ethernet Receive Data In Negative: The receive data
inputs may be swapped internally with transmit data
outputs when Auto-MDIX is enabled.
1
Ethernet RX
Data In
Positive
TPI+ AIO Ethernet Receive Data In Positive: The receive data
inputs may be swapped internally with transmit data
outputs when Auto-MDIX is enabled.
1
External
PHY Bias
Resistor
EXRES AI External PHY Bias Resistor: Used for the internal
PHY bias circuits. Connect to an external 12.4K 1.0%
resistor to ground.