Status register, Table 4-12. status register, Table 4-13. status register definitions – Lantronix DSTni-EX User Manual

Page 51

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43

Status Register

The Status register reports the transaction status within the USB. When the microprocessor has
received a TOK_DNE interrupt, the Status register should be read to determine the status of the
previous endpoint communication. The data in the status register is valid when the TOK_DNE
interrupt bit is asserted.

The Status register is actually a read window into a status FIFO maintained by the USB. When
the USB uses a BD, it updates the status register. If another USB transaction is performed
before the TOK_DNE interrupt is serviced the USB will store the status of the next transaction in
the STAT FIFO. Therefore, the Status register is actually a four byte FIFO which allows the
microprocessor to process one transaction while the SIE is processing the next. Clearing the
TOK_DNE bit in the Interrupt Status register causes the SIE to update the Status register with
the contents of the next STAT value. If the data in the STAT holding register is valid, the SIE
will immediately reassert the TOK_DNE interrupt.

Table 4-12. Status Register

BIT

15

14

13

12

11

10

9

8

7

6

5

4

3

2

1

0

OFFSET

04h

Control Status


FIELD

JSTATE

SE0

TXDSUSPEND

TOKENBUSY

RESET

HOSTMODE EN

RESUME

ODD_RST

USB_EN

ENDP

TX

ODD

/// ///

RESET

0

0

0

0

0 0 0 0 0

0

0

0

0 0 0 0

RW

R

R

R

R

R R R R R

R

R

R

R R R R

Table 4-13. Status Register Definitions

Bits

Field Name

Description

15 JSTATE

Live USB Differential Receiver JSTATE Signal
The polarity of this signal is effected by the current state of LS_EN (see the
Address register on page 45).

14

SE0

Live USB Single Ended Zero Signal

13 TXDSUSPEND

TOKENBUSY

TXD_SUSPEND and TOKEN BUSY
Dual-use control signal for accessing TXD_SUSPEND when the USB is a target
and Token Busy when the USB is in host mode.

The TXD Suspend bit informs the processor that the SIE has disable packet
transmission and reception. This bit is set by the SIE when a Setup Token is
received allowing software to dequeue any pending packet transactions in the
BDT before resuming token processing. Clearing this bit lets the SIE continue
token processing.

The Token Busy bit informs the host processor that the USB is busy executing a
USB token and no more token commands should be written to the Token
Register. Software should check this bit before writing any tokens to the Token
Register to ensure that token commands are not lost.

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