1 functions – Panasonic 324566-A User Manual

Page 91

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Nortel Secure Router 8012
Hardware Description

4 Boards

Issue 5.3 (6 April 2009)

Nortel Networks Inc.

4-33

Attribute

Description

DCE

Minimum baud rate

1200 bit/s

1200 bit/s

Maximum baud rate

64 kbit/s

2.048 Mbit/s

Cable type

V.24 DTE cable
V.24 DCE cable
V.35 DTE cable
V.35 DCE cable

Supported protocol

PPP, HDLC, Frame Relay, MFR, and MP

4.10 Channelized and unchannelized POS optical interface
modules

The channelized and unchannelized POS optical interface modules of the Secure Router 8012
are as follows:

z

FIC

1-port channelized POS optical module (1CPOS[E])

z

HIC

1-port unchannelized POS/155M optical interface module (RT-HIC-1POS)

2-port unchannelized POS/155M optical interface module (RT-HIC-2POS)

4-port unchannelized POS/155M optical interface module (RT-HIC-4POS)

1-port channelized POS optical interface E1 module (RT-HIC-CPE1)

1-port channelized POS optical interface T1 module (RT-HIC-CPT1)

4.10.1 Functions

The Packet over SDH/SONET (POS) interface is a high-speed transport interface that uses the
SONET/SDH network as the transport interface. In the sending direction, the POS interface
encapsulates IP data packets received from the Network Process Unit (NPU) with the PPP or
HDLC protocol, and then maps the encapsulated data packets to the payload of the
SONET/SDH frame for transmission on the optical network. In the receiving direction, the
POS interface receives optical signals, processes them through reverse operations, and then
sends them to the NP.

The POS interface board can be used to connect Secure Router 8012 routers to SONET/SDH
devices, or to connect Secure Router 8012 routers directly.

One POS interface module can be channelized into 63 E1 channels, or 84 T1 channels.

The functions of interface are as follows:

z

supports hardware flow control and software resetting

z

supports various link layer protocols, such as PPP, Frame Relay, and HDLC

z

supports the working modes of FPGA loopback, the system-side loopback of the
physical chip, and the line-side loopback

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