National Instruments PC-DIO-24 - Manual (Page 30)

Theory of Operation Chapter 3
PC-DIO-24 User Manual 3-2 © National Instruments Corporation
Address Decoder
The base address used by the board is determined by an onboard switch setting. The address on
the PC I/O Channel bus is monitored by the address decoder. If the address on the bus matches
the selected I/O base address of the board, the board is enabled and the corresponding register on
the PC-DIO-24 is accessed.
Bus Transceivers
The bus transceivers control the sending and receiving of data lines to and from the PC I/O
Channel.
PC I/O Channel Control Circuitry
This circuitry monitors and transmits the PC I/O Channel control and support signals. The
control signals identify transfers as read or write, configuration or I/O, and 8-bit or 16-bit. The
PC-DIO-24 only uses 8-bit transfers.
82C55A Programmable Peripheral Interface
The 82C55A PPI is the heart of the PC-DIO-24. This chip has 24 programmable I/O pins that
represent three 8-bit ports—PA, PB, and PC. Each port can be programmed as an input or an
output port. The 82C55A has three modes of operation—simple I/O (mode 0), strobed I/O
(mode 1), and bidirectional I/O (mode 2). In modes 1 and 2, the three ports are divided into two
groups—group A and group B. Each group has eight data bits and four control and status bits
from port C (PC). Modes 1 and 2 use handshaking signals from port C to synchronize data
transfers. Refer to Chapter 4, Register-Level Programming, or to Appendix C, OKI 82C55A
Data Sheet, for more detailed information.
Interrupt Control Circuitry
The interrupt level used by the PC-DIO-24 is selected by the onboard jumper W2. Another
onboard jumper, W1, is used to enable interrupts from the PC-DIO-24. The setting for W1
selects PC2, PC4, or PC6 as the active low interrupt enable signal. Selecting N/C for W1
disables interrupts from the PC-DIO-24. When the onboard jumpers are set to enable interrupts,
the 82C55A can be programmed to generate an interrupt request by setting INTRA for group A
or INTRB for group B. When interrupts are enabled for group A, an active high signal on the
PC3 line generates an interrupt request. When interrupts are enabled for group B, an active high
signal on the PC0 line generates an interrupt request.
Digital I/O Connector
All digital I/O is transmitted through a standard 50-pin male connector. The pin assignments for
the I/O connector are compatible with standard 24-channel digital I/O applications. All even
pins on this connector are attached to logic ground, and pin 49 is connected to +5 V through a
protection fuse (F1), which is often required to operate I/O module mounting racks. See
Chapter 2, Configuration and Installation, for additional information.