Document Outline

• NI6115/6120 User Manual
• Support
  • Worldwide Technical Support and Product Information
  • National Instruments Corporate Headquarters
  • Worldwide Offices
• Important Information
  • Warranty
  • Copyright
  • Trademarks
  • Patents
  • WARNING REGARDING USE OF NATIONAL INSTRUMENTS PRODUCTS
• Compliance
• Contents
• About This Manual
  • Conventions
  • National Instruments Documentation
  • Related Documentation
• Chapter 1 Introduction
  • About the NI 6115/6120
  • Using PXI with CompactPCI
    • Table 1-1. NI PXI-6115/6120 J2 Pin Assignment
  • What You Need to Get Started
  • Software Programming Choices
    • NI-DAQ
      • Figure 1-1. The Relationship Among the Programming Environment, NI-DAQ, and the Hardware
    • National Instruments ADE Software
  • Optional Equipment
  • Custom Cabling
  • Unpacking
  • Safety Information
• Chapter 2 Installing and Configuring the NI 6115/6120
  • Installing the Software
  • Installing the Hardware
  • Configuring the Device
• Chapter 3 Hardware Overview
  • Figure 3-1. NI 6115 Block Diagram
  • Figure 3-2. NI 6120 Block Diagram
  • Analog Input
    • Input Mode
    • Input Polarity and Input Range
      • Table 3-1. Input Range and Measurement Precision
      • Considerations for Selecting Input Ranges
    • Input Coupling
  • Analog Output
  • Analog Trigger
    • Figure 3-3. Analog Trigger Block Diagram for the NI 6115/6120
    • Figure 3-4. Below-Low-Level Analog Triggering Mode
    • Figure 3-5. Above-High-Level Analog Triggering Mode
    • Figure 3-6. Inside-Region Analog Triggering Mode
    • Figure 3-7. High-Hysteresis Analog Triggering Mode
    • Figure 3-8. Low-Hysteresis Analog Triggering Mode
  • Antialiasing Filters
    • Figure 3-9. Effects of Hardware and Software Filtering on Antialiasing
  • Phase-Locked Loop Circuit
    • Figure 3-10. PLL Block Diagram
  • Correlated Digital I/O
  • Timing Signal Routing
    • Figure 3-11. STARTSCAN Signal Routing
    • Programmable Function Inputs
    • Device and RTSI Clocks
    • RTSI Triggers
      • Figure 3-12. PCI RTSI Bus Signal Connection
      • Figure 3-13. PXI RTSI Bus Signal Connections
• Chapter 4 Connecting Signals
  • Table 4-1. I/O Connector Details
  • I/O Connector
    • Figure 4-1. I/O Connector Pin Assignment for the NI 6115/6120
    • I/O Connector Signal Descriptions
      • Table 4-2. Signal Descriptions for I/O Connector Pins
      • Table 4-3. Analog I/O Signal Summary for the NI 6115
      • Table 4-4. Analog I/O Summary for the NI 6120
      • Table 4-5. Digital I/O Signal Summary
  • Types of Signal Sources
    • Floating Signal Sources
    • Ground-Referenced Signal Sources
  • Connecting Analog Input Signals
    • Connections for Ground-Referenced Signal Sources
      • Figure 4-2. Pseudodifferential Input Connections on the NI 6115 for Ground-Referenced Signals
      • Figure 4-3. Pseudodifferential Input Connections on the NI 6120 for Ground-Referenced Signals
    • Connections for Nonreferenced or Floating Signal Sources
      • Figure 4-4. Differential Input Connections on the NI 6115 for Nonreferenced Signals
      • Figure 4-5. Differential Input Connections on the NI 6120 for Nonreferenced Signals
    • Common-Mode Signal Rejection Considerations
  • Working Voltage Range
  • Connecting Analog Output Signals
    • Figure 4-6. Analog Output Connections
  • Connecting Digital I/O Signals
    • Figure 4-7. Digital I/O Connections
  • Correlating DIO Signal Connections
    • Figure 4-8. Clock Signal Driving DI and DO Signals
    • Figure 4-9. Rising-Edge AO Update Signal Driving a DIO Signal
    • Figure 4-10. Falling-Edge RTSI Clock Signal Driving a DIO Signal
  • Power Connections
  • Connecting Timing Signals
    • Figure 4-11. Timing I/O Connections
    • Programmable Function Input Connections
    • DAQ Timing Connections
      • Figure 4-12. Typical Posttriggered Acquisition
      • Figure 4-13. Typical Pretriggered Acquisition
      • TRIG1 Signal
      • Figure 4-14. TRIG1 Input Signal Timing
      • Figure 4-15. TRIG1 Output Signal Timing
      • TRIG2 Signal
      • Figure 4-16. TRIG2 Input Signal Timing
      • Figure 4-17. TRIG2 Output Signal Timing
      • STARTSCAN Signal
      • Figure 4-18. STARTSCAN Input Signal Timing
      • Figure 4-19. STARTSCAN Output Signal Timing
      • CONVERT* Signal
      • Figure 4-20. CONVERT* Input Signal Timing
      • Figure 4-21. CONVERT* Output Signal Timing
      • AIGATE Signal
      • SISOURCE Signal
      • Figure 4-22. SISOURCE Signal Timing
      • SCANCLK Signal
      • Figure 4-23. SCANCLK Signal Timing
      • EXTSTROBE* Signal
      • Figure 4-24. EXTSTROBE* Signal Timing
    • Waveform Generation Timing Connections
      • WFTRIG Signal
      • Figure 4-25. WFTRIG Input Signal Timing
      • Figure 4-26. WFTRIG Output Signal Timing
      • UPDATE* Signal
      • Figure 4-27. UPDATE* Input Signal Timing
      • Figure 4-28. UPDATE* Output Signal Timing
      • UISOURCE Signal
      • Figure 4-29. UISOURCE Signal Timing
    • General-Purpose Timing Signal Connections
      • GPCTR0_SOURCE Signal
      • Figure 4-30. GPCTR0_SOURCE Signal Timing
      • GPCTR0_GATE Signal
      • Figure 4-31. GPCTR0_GATE Signal Timing in Edge-Detection Mode
      • GPCTR0_OUT Signal
      • Figure 4-32. GPCTR0_OUT Signal Timing
      • GPCTR0_UP_DOWN Signal
      • GPCTR1_SOURCE Signal
      • Figure 4-33. GPCTR1_SOURCE Signal Timing
      • GPCTR1_GATE Signal
      • Figure 4-34. GPCTR1_GATE Signal Timing in Edge-Detection Mode
      • GPCTR1_OUT Signal
      • Figure 4-35. GPCTR1_OUT Signal Timing
      • GPCTR1_UP_DOWN Signal
      • Figure 4-36. GPCTR Timing Summary
      • FREQ_OUT Signal
  • Field Wiring Considerations
• Chapter 5 Calibration
  • Loading Stored Calibration Constants
  • Self-Calibration
  • External Calibration
• Appendix A Specifications
  • Table A-1. NI 6115 Analog Input DC Accuracy Information
  • Table A-2. NI 6120 Analog Input DC Accuracy Information
  • Table A-3. NI 6115 Analog Input Dynamic Characteristics
  • Table A-4. NI 6120 Analog Input Dynamic Characteristics
  • Figure A-1. NI 6115 Total Harmonic Distortion Plus Noise (THD + N)
  • Figure A-2. NI 6120 Total Harmonic Distortion Plus Noise (THD + N)
  • Figure A-3. NI 6115 High-Voltage THD + N
  • Figure A-4. NI 6120 High-Voltage THD + N
  • Figure A-5. NI 6115 THD + N with Filters
  • Figure A-6. NI 6120 THD + N with Filters
  • Table A-5. NI 6115 Analog Output DC Accuracy Information
  • Table A-6. NI 6120 Analog Output DC Accuracy Information
  • Table A-7. Digital logic levels
• Appendix B Common Questions
  • Figure B-1. Setting Filter Values in LabVIEW
  • Table B-1. Signal Name Equivalencies
• Appendix C Technical Support and Professional Services
• Glossary
  • Numbers/Symbols
  • A-B
  • C-D
  • E
  • F-G
  • H-K
  • L-M
  • N-P
  • R
  • S
  • T-U
  • V-W
• Index
  • Numerics
  • A
  • B-C
  • D-E
  • F-G
  • H-M
  • N-P
  • Q-S
  • T
  • U-W