NEC PD754144 - Manual (Page 49)

CHAPTER 3 FEATURES OF ARCHITECTURE AND MEMORY MAP
49 User’s Manual U10676EJ3V0UM
Figure 3-6. Configuration of General-Purpose Registers (8-Bit Processing)
XA
HL
DE
BC
XA'
HL'
DE'
BC'
00H
02H
04H
06H
08H
0AH
0CH
0EH
When
RBE RBS = 0
XA
HL
DE
BC
XA'
HL'
DE'
BC'
10H
12H
14H
16H
18H
1AH
1CH
1EH
When
RBE RBS = 2
XA'
HL'
DE'
BC'
XA
HL
DE
BC
00H
02H
04H
06H
08H
0AH
0CH
0EH
When
RBE RBS = 1
XA'
HL'
DE'
BC'
XA
HL
DE
BC
10H
12H
14H
16H
18H
1AH
1CH
1EH
When
RBE RBS = 3
.
. .
.