Texas Instruments TMS320 DSP - Manual (Page 40)

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4.2 Program Memory
Program Memory
Algorithms must characterize their static data memory requirements by filling out a table such as that
illustrated below. Each row represents the requirements for an individual object file that is part of the
algorithm's implementation. Each named COFF section (that contains data) in the algorithm's object files
is represented by a column. Each entry should contain the size (in 8-bit bytes) required by the algorithm,
any alignment requirements, whether the data is read-only or read-write, and whether the data is scratch
memory or not. If no special alignment is required, the alignment number should be set to zero.
.data .bss
Object files Size Align Read/Write Scratch Size Align Read/Write Scratch
a.obj 12 0 R no 32 0 R no
b.obj 0 0 R no 0 0 R no
Static data in an algorithm forces the system integrator to dedicate a region of the system's memory to a
single specific purpose. While this may be desirable in some systems, it is rarely the right decision for all
systems. Moreover, modifiable static data usually indicates that the algorithm is not reentrant. Unless
special precautions are taken, it is not possible for a reentrant function to modify static data.
Guideline 6
Algorithms should minimize their static memory requirements.
With the exception of initialized data, it is possible to virtually eliminate all static data in an algorithm using
the eXpressDSP-compliant IALG interface. The implementation of interfaces is described in Section 3.2
and a detailed description of the IALG interface is provided in the TMS320 DSP Algorithm Standard API
Reference.
Guideline 7
Algorithms should never have any scratch static memory.
Algorithm code can often be partitioned into two distinct types: frequently accessed code and infrequently
accessed code. Obviously, inner loops of algorithms are frequently accessed. However, like most
application code, it is often the case that a few functions account for most of the MIPS required by an
application.
Guideline 8
Algorithm code should be partitioned into distinct sections and each section should be characterized by
the average number of instructions executed per input sample.
Characterizing the number of instructions per sample for each algorithm allows system integrators to
optimally assign on-chip program memory to the appropriate algorithms. It also allows one to perform a
quantitative cost/benefit analysis of simple on-chip program overlay policies, for example.
Rule 22
All algorithms must characterize their program memory requirements.
All algorithms must characterize their program memory requirements by filling out a table such as that
shown below. Each entry should contain the size (in 8-bit bytes) required by the algorithm and any
alignment requirements. If no special alignment is required, the alignment number should be set to zero
40 Algorithm Performance Characterization SPRU352G – June 2005 – Revised February 2007
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