Texas Instruments TMS320 DSP - Manual (Page 66)

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6.8 Resource Characterization
Resource Characterization
DMA Rule 3
Each of the IDMA2 or IDMA3 methods implemented by an algorithm must be independently
relocateable.
The pragma directive must be used to place each method in appropriate subsections to enable
independent relocatability of the methods by the system integrator. The table below summarizes the
section names and their purpose.
Section Name Purpose
.text:dmaGetChannels Implementation of the IDMA2 or IDMA3 dmaGetChannels method
.text:<name> Implementation of the IDMA2 or IDMA3 <name> method
In other words, an algorithm's implementation of the IDMA2 or IDMA3 method <name> should be placed
in a COFF section named ".text:<name>".
The resources consumed by algorithms implementing the IALG interface are restricted to MIPS and
memory. These resources must be documented according to the rules defined in
Chapter 4 . Algorithms
implementing the IDMA2 or IDMA3 interface will consume an additional system resource. This resource
must also be documented.
Some DMA managers use software queuing for DMA jobs. These systems need to know how many DMA
transfers are queued up so that it can set aside memory to hold the information for all the transfers. It is
important that the system integrator knows the worst-case depth of the queue of DMA jobs (number of
concurrent transfers) on each logical channel.
DMA Rule 4
All algorithms must state the maximum number of concurrent DMA transfers for each logical channel.
This can be accomplished by filling out a table such as that shown below.
Logical channel number Number of concurrent transfers
(depth of queue)
0 3
1 1
In the example above, that algorithm requires two DMA logical channels; channel 0 will not issue more
than three concurrent DMA transfers, and channel 1 will not issue more that one concurrent DMA transfer.
It is important that system integrators be able to wisely optimize the assignments of DMA resources
among algorithms. For example, if a system integrator chooses to share a physical DMA channel between
algorithms in a preemptive system, the frequency of the data transfers and the size of the data transfers
might affect this assignment.
DMA Rule 5
All agorithms must characterize the average and maximum size of the data transfers per logical channel
for each operation. Also, all algorithms must characterize the average and maximum frequency of data
transfers per logical channel for each operation.
This can be accomplished by filling out a table such as that shown below.
Logical Data Transfers (bytes) Frequency
Channel
Operation Number Average Maximum Average Maximum
algActivate() 0 512 512 1 1
process() 0 768 1024 5 7
process() 1 64 128 8 8
Use of the DMA Resource 66 SPRU352G – June 2005 – Revised February 2007
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